- Jul 16, 2016
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I've been thinking about how Zen, Zen+, Zen 2, and Zen 3, all relate to each other. A leaked slide from AMD points to AMD taking a sort of tick tock approach, only naming it "inflection" and "optimization". This has been semi-confirmed by James Prior mentioning it. According to this cadence, we should see a Zen 2 optimization cycle after Zen 2, however AMD's own architecture and server roadmaps point to Zen 3 coming somewhere in 2020, where you would expect the Zen 2 optimization cycle to exist. So what gives? And there's also the question of manufacturing, where and what products will be made at TSMC's 7nm, and GloFo's 7nm, with Lisa Su claiming both will be used (but never detailed to what capacity).
Well, there's another interesting point to think about. We're at an "inflection" point in terms of the I/O technologies being offered. PCI-E Gen 4 is almost surely going to happen with EPYC 2, but PCI-E Gen 5 is being released very soon, offering yet another doubling of bandwidth over PCI-E Gen 4. And then we've got DDR5, with test IP already hitting JEDEC spec, and with JEDEC claiming the first products using DDR5 should hit the market somewhere in 2020.
This is all speculation based on probable rumors and my analysis!!!
Here's how I see things going:
- H2 2018: we're going to see Zen 2 based EPYC sampling to partners, manufactured on TSMC's 7nm. This is public information, with Lisa Su claiming they will use whichever fab is first ready, and TSMC is known to already be in HVM. AMD already has silicon back in the labs going through bring up, and Lisa held an EPYC 2 package at Computex.
- H1 2019: Launch of EPYC 2. This will be a sort of soft launch like EPYC 1 had, with just the specifications released, and some limited customer announcements. The actual ramp will happen later. EPYC 2 will have PCI-E Gen 4 support, and will have 48 cores as ServeTheHome claims.
- Q2 2019: Zen 2 Ryzen processors harvested from the same TSMC 7nm die will release. GloFo is not ready yet (they're only entering risk late 2018 at best), and yields of a fresh process like 7nm means there will be plenty of defective dies that could be sold to consumers. AMD is clearly trying to hit a yearly cadence of new processors to consumers, so this would be perfect timing. PCI-E Gen 4 is backwards compatible with PCI-E Gen 3, so slotting it into the existing AM4 motherboards will not be a problem. It will just work at Gen 3 speeds.
I'd expect these processors to clock in the 4.5-4.6GHz boost range and have ~15% higher IPC. Clockspeed estimate is based on ARM's claims of minor performance improvement with 7nm (on top of minor improvement of 10nm), along with a more complex Zen 2 design dropping clockspeeds a bit. Top mainstream will be 12 cores.
- Q4 2019: Ramp of EPYC 2. Since EPYC 2 sits on the same platform as EPYC 1, and its an advancement of an existing architecture, it will have a shorter certification cycle. In a Tech Analysts podcast, Patrick Moorhead claimed about 3-6 months faster is his estimate.
- H1 2020: Sampling of Zen 3 based EPYC 3 (Milan). AMD reportedly wants to be first to DDR5. AMD also prides themselves on their massive I/O capabilities with EPYC. Therefore I expect Zen 3 to have a DDR5 memory controller, along with PCI-E Gen 5, both of which should see the first devices in 2020. I also predict Zen 3 to use AMD's recently filed patents (forgot to save them, doh) which describe silicon bridges akin to Intel's EMIB, therefore reducing die to die latency and boosting bandwidth and power efficiency. All of this will be made on TSMC's 7FF+, allowing AMD to fit 16 cores per die with minimal die size expansion, enabling an EPYC of up to 64 cores according to both ServeTheHome, and CanardPC who initially broke the 64 Core/256MB L3 cache rumor.
- H1 2020: We will see AMD transition Ryzen to GloFo's 7nm, which should actually be ready by then. Due to the way the WSA works, this will increase margins for Ryzen based processors. In addition to that, if GloFo's performance claims hold, then GloFo's process should outperform TSMC's process. This would allow AMD to create an optimization cycle of Zen 2 for consumer with higher clockspeeds. I'd expect 4.8GHz-5GHz boost clocks, with maybe a minor 1%-2% IPC gain like Zen+. Still 12c max just as before.
- H2 2020: Launch of Zen 3 EPYC, fulfilling the 2020 promise.
- H1 2021: The release of AM5 socket, officially ending backwards compatibility with the AM4 socket. The AM5 socket will support PCI-E Gen 5, and DDR5. The new Ryzen lineup will be Zen 3 based, either made on 7FF+ or transitioned to GloFo's 7nm Gen 3 process. 7FF+ only promises efficiency and density improvements, while 7nm Gen 3 promises performance improvements too, so it would make sense to transition Zen 3 to it if the economics allow it.
I don't expect core counts to rise, but rather mainstream will maintain 12 cores at smaller die sizes and higher IPC/clockspeed.
-H2 2021: Ramp of Zen 3 EPYC
And that's it. After considering the economic viability, competitive landscape, and market opportunities of AMD, combined with AMD's own statements and probable leaks (probable sources only), I believe this is AMD's plan right now.
Well, there's another interesting point to think about. We're at an "inflection" point in terms of the I/O technologies being offered. PCI-E Gen 4 is almost surely going to happen with EPYC 2, but PCI-E Gen 5 is being released very soon, offering yet another doubling of bandwidth over PCI-E Gen 4. And then we've got DDR5, with test IP already hitting JEDEC spec, and with JEDEC claiming the first products using DDR5 should hit the market somewhere in 2020.
This is all speculation based on probable rumors and my analysis!!!
Here's how I see things going:
- H2 2018: we're going to see Zen 2 based EPYC sampling to partners, manufactured on TSMC's 7nm. This is public information, with Lisa Su claiming they will use whichever fab is first ready, and TSMC is known to already be in HVM. AMD already has silicon back in the labs going through bring up, and Lisa held an EPYC 2 package at Computex.
- H1 2019: Launch of EPYC 2. This will be a sort of soft launch like EPYC 1 had, with just the specifications released, and some limited customer announcements. The actual ramp will happen later. EPYC 2 will have PCI-E Gen 4 support, and will have 48 cores as ServeTheHome claims.
- Q2 2019: Zen 2 Ryzen processors harvested from the same TSMC 7nm die will release. GloFo is not ready yet (they're only entering risk late 2018 at best), and yields of a fresh process like 7nm means there will be plenty of defective dies that could be sold to consumers. AMD is clearly trying to hit a yearly cadence of new processors to consumers, so this would be perfect timing. PCI-E Gen 4 is backwards compatible with PCI-E Gen 3, so slotting it into the existing AM4 motherboards will not be a problem. It will just work at Gen 3 speeds.
I'd expect these processors to clock in the 4.5-4.6GHz boost range and have ~15% higher IPC. Clockspeed estimate is based on ARM's claims of minor performance improvement with 7nm (on top of minor improvement of 10nm), along with a more complex Zen 2 design dropping clockspeeds a bit. Top mainstream will be 12 cores.
- Q4 2019: Ramp of EPYC 2. Since EPYC 2 sits on the same platform as EPYC 1, and its an advancement of an existing architecture, it will have a shorter certification cycle. In a Tech Analysts podcast, Patrick Moorhead claimed about 3-6 months faster is his estimate.
- H1 2020: Sampling of Zen 3 based EPYC 3 (Milan). AMD reportedly wants to be first to DDR5. AMD also prides themselves on their massive I/O capabilities with EPYC. Therefore I expect Zen 3 to have a DDR5 memory controller, along with PCI-E Gen 5, both of which should see the first devices in 2020. I also predict Zen 3 to use AMD's recently filed patents (forgot to save them, doh) which describe silicon bridges akin to Intel's EMIB, therefore reducing die to die latency and boosting bandwidth and power efficiency. All of this will be made on TSMC's 7FF+, allowing AMD to fit 16 cores per die with minimal die size expansion, enabling an EPYC of up to 64 cores according to both ServeTheHome, and CanardPC who initially broke the 64 Core/256MB L3 cache rumor.
- H1 2020: We will see AMD transition Ryzen to GloFo's 7nm, which should actually be ready by then. Due to the way the WSA works, this will increase margins for Ryzen based processors. In addition to that, if GloFo's performance claims hold, then GloFo's process should outperform TSMC's process. This would allow AMD to create an optimization cycle of Zen 2 for consumer with higher clockspeeds. I'd expect 4.8GHz-5GHz boost clocks, with maybe a minor 1%-2% IPC gain like Zen+. Still 12c max just as before.
- H2 2020: Launch of Zen 3 EPYC, fulfilling the 2020 promise.
- H1 2021: The release of AM5 socket, officially ending backwards compatibility with the AM4 socket. The AM5 socket will support PCI-E Gen 5, and DDR5. The new Ryzen lineup will be Zen 3 based, either made on 7FF+ or transitioned to GloFo's 7nm Gen 3 process. 7FF+ only promises efficiency and density improvements, while 7nm Gen 3 promises performance improvements too, so it would make sense to transition Zen 3 to it if the economics allow it.
I don't expect core counts to rise, but rather mainstream will maintain 12 cores at smaller die sizes and higher IPC/clockspeed.
-H2 2021: Ramp of Zen 3 EPYC
And that's it. After considering the economic viability, competitive landscape, and market opportunities of AMD, combined with AMD's own statements and probable leaks (probable sources only), I believe this is AMD's plan right now.
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