Discussion Intel current and future Lakes & Rapids thread

[ashFTW]

Speculation: Emerald Rapids tile (~480 mm2) with an additional row of cores. Or, up to 76 cores for the chip.

 

[ashFTW]

Speculation: Granite Rapids and Sierra Rapids with disaggregated design, on the same platform. A "4-stack" Foveros and co-EMIB base die with all the I/O, memory, and cache. The P and E core tiles may be assemblies of 2 or more smaller chiplets. I expect the max core counts for Granite to be 128, and Sierra to be 3-4 times more.



Edit: Fixed Typo (Sierra Rapids to Sierra Forest).

 

[ashFTW]

Speculation: Falcon Ridge built on the same platform as Granite and Sierra Rapids, continuing the path to Zettascale.


Edit: Fixed Typo (Sierra Rapids to Sierra Forest).

 

[ashFTW]

Speculation: Falcon Ridge built on the same platform as Granite and Sierra Rapids, continuing the path to Zettascale.
View attachment 62607

Maybe future Gaudi and FPGA tiles can be brought into this framework as well.

 

[IntelUser2000]

I'm repeating myself a lot, but perhaps this helps...

We can break this discussion down to two questions. Let's answer the first one, and then answering the second becomes much easier.

This is a well thought out post.

I agree, monolithic or 2-tile is the way to go. MLID was the first one to suggest one in public but I think there's a good chance he'll get it right.

The tile configuration brings Intel another advantage, especially for segmentation and marketing: Countless configurations.

Options for: UPI connections, core count, memory channels, PCI Express, accelerators, tile count, disabling cores/tiles, AVX and AMX configurations.

 

[Exist50]

Yea I'm not sure if I buy the fantastic, 30%+ gains even for the Royal Cove project. We'll see when it happens. Yes I can believe amazing amount of effort and reorganization of teams would happen, but in terms of absolute numbers I am skeptical.

Of course you're skeptical, as would be any rational person. "Extraordinary claims require extraordinary evidence" and certainly I haven't presented any. So just take it on faith for now that I believe Royal is capable of even more than rumored, insane as that may sound. There will be plenty of time for I-told-you-sos later, haha.

Though one thing to keep in mind is that Royal is an independent effort and team. They might have picked up one or two of the Atom folk along the way just by proximity, but it's a completely separate project from Core and Atom. Think the original members largely came from Intel Labs, along with one or two high profile hires. Actually, success for Royal might very well kill Core, so that'll be interesting to watch play out. Might even coexist for a time.

 

[IntelUser2000]

Think the original members largely came from Intel Labs, along with one or two high profile hires. Actually, success for Royal might very well kill Core, so that'll be interesting to watch play out. Might even coexist for a time.

Interesting. I prefer to be conservative because marketing always hypes everything. And I don't mean just advertisements. Reviewers, and even so-called technical presentations count too.

You see some things that are beyond expectations, but pretty rare. Makes sense. The whole semiconductor industry already advances at an astonishing rate. Even the worst of them. A 10 year old computer fan is decades ahead of many non-computer ones. Heatsinks, Fans, Power Delivery, Circuit Design, Chemistry, all advance at a blistering pace to further the computer industry. It's amazing what they do.

I do GPU repair and after looking at that the non-computer circuitry start looking very doable, and sometimes trivial. It's fun.

 

[Exist50]

Speculation: Falcon Ridge built on the same platform as Granite and Sierra Rapids, continuing the path to Zettascale.
View attachment 62607

Ok, something's been bugging me since the announcement the other day, and I finally figured out what it is. They've changed the graphic!

If you go back to February, they showed this:

Which looks vaguely similar to what they've shown for Granite Rapids:

But now they've shown this, which looks like nothing else they've shown before.

So I initially thought that like Meteor Lake, maybe one is for representative purposes only. Seems totally possible. But then why change it? So I've got two alternative theories.

a) Granite Rapids itself changed topologies when they delayed it to '24. Possible, but that seems like a huge risk.

b) What they're showing here is actually a sneak peak at a post-GNR topology, and Falcon Shores is more like '25 or '26.

 

[ashFTW]

a) Granite Rapids itself changed topologies when they delayed it to '24. Possible, but that seems like a huge risk.

The switch was probably made towards the end of ‘21 after Pat joined Intel. A more competitive product was needed (including a more advanced process) to counter AMD, Nvidia, and ARM advance. This gave them 3 years to ‘24. That pace is urgent, but perhaps not “break-neck” crazy.

Which looks vaguely similar to what they've shown for Granite Rapids:

But now they've shown this, which looks like nothing else they've shown before.

This looks more like a “2 stack” design, similar to Ponte Vecchio. Maybe they switched to “4 stack” design once they realized they needed to push the release by a year and move to Intel 3 to compete better, while also better aligning with the evolving Falcon Shores design. Smaller reticle size with High NA EUV use will also start to play out soon.

b) What they're showing here is actually a sneak peak at a post-GNR topology, and Falcon Shores is more like '25 or '26.

It could be ‘25. Parts of Falcon Shores are very likely to be on Intel 20A, especially the Xe parts. The x86 parts can be GNR or SRR on Intel 3. Now that the designs are disaggregated, the various tiles can progress independently and still come together in yearly updates, as long as the interfaces are preserved.

 

[IntelUser2000]

I have doubts on Falcon Shores using the same platform as Granite Rapids. Maybe Granite Rapids HBM?

I see it as a spiritual successor to the -AP line, and further back, the socketed Xeon Phi.

 

[ashFTW]

I have doubts on Falcon Shores using the same platform as Granite Rapids. Maybe Granite Rapids HBM?

I see it as a spiritual successor to the -AP line, and further back, the socketed Xeon Phi.

Sapphire Rapids with and without HBM use the same Eagle Stream platform/socket, don’t they? HBM concerns should be internal to the socket. Do all XCC Sapphire Rapids tiles not have the ability to interface with HBM2e?

Edit: Hmmm ... the ISSCC 2022 paper doesn't mention HBM explicitly. Interesting! So did Intel make a separate XCC tile with support for HBM, or is that just not labelled in the floorpan. What's gpio? And what's the yellow and pink stuff?

 

[IntelUser2000]

@ashFTW Sapphire Rapids with HBM clearly uses a different package. And it's much larger too.

GPIO stands for "General Purpose I/O". Systems have tons of I/O buses and not all are fancy like UPI or DMI. GP in the GPIO means that it can be reconfigured for what's needed. But of course much less bandwidth.

 

[ashFTW]

@ashFTW Sapphire Rapids with HBM clearly uses a different package. And it's much larger too.

Ok, I see that they have different size packages, but aren’t they both using LGA 4677, and the Eagle Stream PCH?


The HBM version package just has these weird “ears sticking out”, which seems like HBM support was an afterthought. Don’t know if every Eagle stream motherboard will be able to accommodate both HBM and non-HBM versions of SPR.

GPIO stands for "General Purpose I/O". Systems have tons of I/O buses and not all are fancy like UPI or DMI. GP in the GPIO means that it can be reconfigured for what's needed. But of course much less bandwidth.

Thanks!

 

[mikk]

In the reddit leak "the biggest architectural change in CPU architecture since the Core architecture" was claimed for Nova Lake. There are rumors about Panther Lake after Lunar, I hope it doesn't mean it has been delayed one generation. If there is Panther Lake the Panther Cove core naming would make sense though.

 

[Henry swagger]

Yea and 8+32 would take way less space and power. 8+32 = 16

8+64 equals 24P. Now tell me how that performs!

And there's an additional benefit where the P core can be P+, and be bigger and more performant than otherwise for even better ST performance and responsiveness. That's the whole point of hybrid. You get to specialize the cores way more than otherwise.

The real promise is this: Rather than doing 8+64 in place of 24P, you do 8 supercharged P cores + 32 E cores. Of course the P cores would be a lot larger. Let's say 30% faster per clock and twice the size.

Remember, this is in addition to whatever they would do normally. So I believe for risk mitigation it'll be spread out over few generations. So rather than new gen P being 18% faster, you have it being 24% faster for next 4-5 generations. And at the end, you have a very large P core and sea of E cores. Supercharging it for low and high thread.

Imagine a intel console with 16 or 24 e-cores.. sony and Microsoft better call intel for the ps6 or xbox 😁

 

[DrMrLordX]

Imagine a intel console with 16 or 24 e-cores.. sony and Microsoft better call intel for the ps6 or xbox 😁

Intel historically wants margins too high for them to show any interest in consoles.

 

[Henry swagger]

In the reddit leak "the biggest architectural change in CPU architecture since the Core architecture" was claimed for Nova Lake. There are rumors about Panther Lake after Lunar, I hope it doesn't mean it has been delayed one generation. If there is Panther Lake the Panther Cove core naming would make sense though.

Maybe intel wants to score 4.500 or 5000 single core performance on cimebench with royal core or panther cove

 

[witeken]

Speculation: Emerald Rapids tile (~480 mm2) with an additional row of cores. Or, up to 76 cores for the chip.


View attachment 62601

Intel's (stylistic) block diagram from HotChips doesn't show any significant space for EMIB. The whole point of EMIB is that it is a small piece of silicon embedded in the package; it is not part of the main die itself. Those are 10 separate tiles.

 

[witeken]

Intel historically wants margins too high for them to show any interest in consoles.

Intel has had low margin businesses before: modem, NAND. (Gross margin wasn't why Intel exited those businesses.)

 

[DrMrLordX]

Intel has had low margin businesses before: modem, NAND. (Gross margin wasn't why Intel exited those businesses.)

They still exited those businesses.

 

[exquisitechar]

Imagine a intel console with 16 or 24 e-cores.. sony and Microsoft better call intel for the ps6 or xbox 😁

I don't think consoles need that many E-cores.

 

[CakeMonster]

Might be a topic for another thread, but even though I always hope for over specced consoles (given the nightmarish lack of RAM on 3rd gen and CPU power on 4th gen), 16 threads seem to be just 'fine' on this gen with GPU power and features if anything holding it back. I don't pretend to know what will be the most important thing for next gen but I kind doubt it will be massive MT performance (although I would prefer a safety margin beyond 8c/16t, AMD design with equal cores might make more sense then).

 

[jpiniero]

So I initially thought that like Meteor Lake, maybe one is for representative purposes only. Seems totally possible. But then why change it? So I've got two alternative theories.

a) Granite Rapids itself changed topologies when they delayed it to '24. Possible, but that seems like a huge risk.

b) What they're showing here is actually a sneak peak at a post-GNR topology, and Falcon Shores is more like '25 or '26.

I'll say both. Granite's topology changed but to the one shown in that picture with the Sea of Cores.

 

[nicalandia]

Sapphire Rapids with and without HBM use the same Eagle Stream platform/socket, don’t they?

They Do..

 

[nicalandia]

Yea and 8+32 would take way less space and power. 8+32 = 16

8+64 equals 24P. Now tell me how that performs!

your math does not checks out. Let's try this again.

8C/16T P cores get anywhere from 18K to 20K points in CBR23 so a 16P would get from 36K to 40K points and a 24P would get from 54K to 60K now a 8P + 32E will get about 52K. so a 8P + 32E it's more like a 21P.

Raptor Lake 8P + 16E would perform like 16P Alder Lake and a 8P + 32P Meteor Lake CPU would match or beat a Zen3 TR Pro 5975X.


So as to the latest Road Map.

Sapphire Rapids: Golden Cove Cores build on Intel 7 process Late 2022
Emerald Rapids: Raptor Cove Cores build on Intel 7 process Late 2023
Granite Rapids: Redwood Cove Cores build on Intel 3 process Late 2024