Discussion Intel current and future Lakes & Rapids thread

[mikk]

So as to the latest Road Map.

Sapphire Rapids: Golden Cove Cores build on Intel 7 process Late 2022
Emerald Rapids: Raptor Cove Cores build on Intel 7 process Late 2023
Granite Rapids: Redwood Cove Cores build on Intel 3 process Late 2024

Granite Rapids on Redwood Cove? Didn't they switch from Intel 4 Redwood Cove to Intel 3 and a new core?

 

[ashFTW]

Intel's (stylistic) block diagram from HotChips doesn't show any significant space for EMIB. The whole point of EMIB is that it is a small piece of silicon embedded in the package; it is not part of the main die itself. Those are 10 separate tiles.
View attachment 62634

You may want to look up the actual SPR floor plans from Intel's IEEE ISSCC conference paper instead! I have pasted them here before. See all the area dedicated to MDF (blue)? That's the multi die fabric. The EMIB die sit below these regions of the tiles. That's the cost of going with tiles instead of monolithic and it's quite substantial. Even if you discount the white regions between the MDF regions, that's still over 1/8th of the area "lost" due to not being monolithic.



The SPR MDF EMIB tiles are small, yet total up to ~215 mm2 compared to the 1600 mm2 area of the tiles themselves.



The die photo above clearly shows the EMIB tiles placed under the MDF regions.

 

[nicalandia]

Granite Rapids on Redwood Cove? Didn't they switch from Intel 4 Redwood Cove to Intel 3 and a new core?

They way it was worded: Granite Rapids have been "Upgraded" to Intel 3 from previous Intel 4... So the Redwood Cove Cores that were going to be used for Granite Rapids will be build on Intel 3 instead.

The HBM version package just has these weird “ears sticking out”, which seems like HBM support was an afterthought.

Don’t know if every Eagle stream motherboard will be able to accommodate both HBM and non-HBM versions of SPR.

Those weird ears sticking(PCB extensions) have been done before by Intel on two different processors(Xeon and Xeon Phi, but Just one ear) and like those only dedicated Motherboards will support Sapphire Rapids -HBM even if they have the same socket LGA 4677

Intel Xeon With single OPI PCB extension


Intel Skylake Omni-Path Fabric Does Not Work on Every Server and Motherboard

Intel Skylake Omni-Path Fabric Does Not Work on Every Server and Motherboard

We investigated and confirmed that Intel Xeon Scalable, codenamed Skylake-SP, Omni-Path Fabric SKUs do not work on every server and motherboard

www.servethehome.com

Intel Knights Landing with PCB extension






You can bet that those Sapphire Rapids-HBM Will not just drop in on a SPR-X Motherboard

 

[Exist50]

They way it was worded: Granite Rapids have been "Upgraded" to Intel 3 from previous Intel 4... So the Redwood Cove Cores that were going to be used for Granite Rapids will be build on Intel 3 instead.

They also said they replaced the core, iirc. Probably upgraded to Lion Cove.

 

[ashFTW]

Intel Knights Landing with PCB extension

View attachment 62644


You can bet that those Sapphire Rapids-HBM Will not just drop in on a SPR-X Motherboard

The Xon Phi “Ear” had a connectors at the end, as you show, but the Sapphire Rapids ones seem to just contain the package “overflow” due to much space taken up by the four HBM stacks. So it seems to only be a motherboard space layout issue, not an electrical one.

I have not looked at the socket spec or any motherboards to determine whether SPR-HBM is designed to fit every Eagle Stream motherboard or not, but I’m leaning towards the same conclusion as you. If so, it’s an unnecessary complication, probably due to late decision to make HBM parts. Or perhaps they were originally only going to be for the Aurora supercomputer, which has a special motherboard anyways. I also wonder, does the FPGA, now sticking out of the socket, not need any cooling?

 

[nicalandia]

They also said they replaced the core, iirc. Probably upgraded to Lion Cove.

Highly Unlikely, knowing how their Client - Data Center/Server Release cycles work.. Their Data Center CPUs are always behind a few months(if not by a year) from their client side, I mean just look at Raptor Lake, it will be released at the same time or even before Sapphire Rapids, then somehow they will skip Redwood Cove and jump to Lion Cove before Lunar Lake? Does that mank any sense?

 

[Exist50]

Highly Unlikely, knowing how their Client - Data Center/Server Release cycles work.. Their Data Center CPUs are always behind a few months(if not by a year) from their client side, I mean just look at Raptor Lake, it will be released at the same time or even before Sapphire Rapids, then somehow they will skip Redwood Cove and jump to Lion Cove before Lunar Lake? Does that mank any sense?

Here's what Gelsinger said.

Granite Rapids is now a product that is on Intel 3, a new microarchitectural core going into it, so it's a higher-performance product in '24.

And the timeline isn't weird. Arrow Lake was also supposed to be in '23, and who knows when each will actually arrive.

Also, clearly the gap to SPR wasn't supposed to be nearly this long.

 

[SteinFG]

I was reading semianalysis article on metor lake, and saw the speculation about how intel would use foveros and foveros omni to make mobile processors, and I immediatly thought about how it can be used for desktop. Don't think Intel will make different SoC or IO tiles, but rather different CPU and GPU tiles, using copper pillars to extend the cpu or gpu platfom something like this. (F models can just not include the GPU tile at all)

 

[ashFTW]

I was reading semianalysis article on metor lake, and saw the speculation about how intel would use foveros and foveros omni to make mobile processors, and I immediatly thought about how it can be used for desktop. Don't think Intel will make different SoC or IO tiles, but rather different CPU and GPU tiles, using copper pillars to extend the cpu or gpu platfom something like this. (F models can just not include the GPU tile at all) View attachment 62652

I believe the same. There is a reason the CPU and GPU tiles are at the edges. I have made similar comments on the use of Foveros Omni on this thread, (mainly) in the context of Xeon. Foveros Omni allows the base tile to also be shared across products of various sizes, and that’s beautiful!!

 

[Exist50]

I was reading semianalysis article on metor lake, and saw the speculation about how intel would use foveros and foveros omni to make mobile processors, and I immediatly thought about how it can be used for desktop. Don't think Intel will make different SoC or IO tiles, but rather different CPU and GPU tiles, using copper pillars to extend the cpu or gpu platfom something like this. (F models can just not include the GPU tile at all) View attachment 62652

Iirc, MTL is just plain Foveros, not Foveros Omni.

 

[nicalandia]

I was reading semianalysis article on metor lake, and saw the speculation about how intel would use foveros and foveros omni to make mobile processors, and I immediatly thought about how it can be used for desktop. Don't think Intel will make different SoC or IO tiles, but rather different CPU and GPU tiles, using copper pillars to extend the cpu or gpu platfom something like this. (F models can just not include the GPU tile at all) View attachment 62652

It makes sense, But that will be a HUGE CPU.. I am doing the Math right now

 

[ashFTW]

Iirc, MTL is just plain Foveros, not Foveros Omni.

The smallest chip shown is Foveros. The larger ones with more P-cores and/or more graphics, will for sure use Foveros Omni to maximize reuse.

 

[ashFTW]

It makes sense, But that will be a HUGE CPU.. I am doing the Math right now

What's more important is that each of the chiplets is small. Of course it has to fit in the target socket.

 

[ashFTW]

Here is an illustration of Foveros and Foveros Omni. The 4 top tiles are just an example; there could me more or less. I have intensionally not labelled the boxes.

If the base tile is designed to contain the connectivity to all the top tiles, then one or more of the tiles can be extended independently. Connecting chipsets is being standardized. See Universal Chiplet Connect Express or UCIe.

 

[IntelUser2000]

your math does not checks out. Let's try this again.

8C/16T P cores get anywhere from 18K to 20K points in CBR23 so a 16P would get from 36K to 40K points and a 24P would get from 54K to 60K now a 8P + 32E will get about 52K. so a 8P + 32E it's more like a 21P.

Raptor Lake 8P + 16E would perform like 16P Alder Lake and a 8P + 32P Meteor Lake CPU would match or beat a Zen3 TR Pro 5975X.

Think you are misunderstanding me. I was saying that in response to comparing 8+32 with 24P. In die area and power they are absolutely NOT comparable. 24P is equal to 8+64. 8+32 will be far smaller and less power than 24P. 8+64 might use similar but perform far higher.

I have not looked at the socket spec or any motherboards to determine whether SPR-HBM is designed to fit every Eagle Stream motherboard or not, but I’m leaning towards the same conclusion as you. If so, it’s an unnecessary complication, probably due to late decision to make HBM parts.

The requirements for HPC are different and the HBM part is likely a spiritual successor to -AP parts. The volume on HBM is far lower* but important. If you are going to put it on a platform that's similar(or even exact) then you want to adjust the smaller volume part to the lower one rather than the other way around. Whatever needed for the HBM part will become a costs adder for the really low end parts that'll go in the same socket.

They justified Cascade Lake-AP based on that it can be physically dense. That chip had lot of pins and were BGA for example. It takes every advantage of AVX512 so it'll have an average power use far higher than regular servers. It makes sense why it has those ears. It's not an afterthought but a simple way of adding HBM.

The HBM part is given way more attention by Intel than volume would suggest. They talk about it since it's the only SPR line that'll have any advantage over Genoa.

SPR HBM is indeed like Cascadelake-AP: https://www.tomshardware.com/news/sapphire-rapids-with-hbm-pictured

It is also noteworthy the HBM-equipped Sapphire Rapids comes in a large BGA form-factor and will be soldered directly to the motherboard.

So if you go BGA and with 64GB per chip HBM memory if you can reduce system memory requirements(or in some cases eliminate it entirely) then you can further reduce the size of the motherboard.

*When I say the HBM part volume will be low, refer back to Cascade Lake-AP. Nothing but supercomputer stuff. Maybe they'll do little better with Sapphire than they did with Cascade.

 

[nicalandia]

What's more important is that each of the chipsets is small. Of course it has to fit in the target socket.

This is my illustration of a 8P + 16E Meteor Lake with SOC and GPU tiles remaining the same and enlarging the Compute and I/O tile to fit the cores

2P + 8P MTL on left and 8P + 16E MTL mock Up on right

Think you are misunderstanding me. I was saying that in response to comparing 8+32 with 24P. In die area and power they are absolutely NOT comparable. 24P is equal to 8+64. 8+32 will be far smaller and less power than 24P. 8+64 might use similar but perform far higher.

Now, I get it. You were refering at die area size.. and now I agree.

 

[ashFTW]

This is my illustration of a 8P + 16E Meteor Lake with SOC and GPU tiles remaining the same and enlarging the Compute and I/O tile to fit the cores

The I/O tile may or may not need enlarging, it depends on the SKU. If necessary a structural tile can be used along with the 9.87 mm2 I/O tile.

 

[nicalandia]

The I/O tile may or may not need enlarging, it depends on the SKU. If necessary a structural tile can be used along with the 9.87 mm2 I/O tile.

I don't really mind the I/O it really doesn't take that much space to be honest. But can't they shrink the SOC tile? What is in there? All of the gains(not much to be honest) by the die shrink are nearly lost by such a huge SOC and GPU Tiles

For example 10nm Monolithic 13900K(Mock Up) vs 7nm Tile based 14900K(Mock Up), they are nearly the same size(both mock up have been sized to specs and are apples to apples comparison based on Semianalysis and Locuza posted information.

 

[IntelUser2000]

They still exited those businesses.

True.

Though they only quit the cellular modem business. Their WiFi division is everywhere.

They will accept lower margins if the volume is high enough. They did go into consoles before with the first Xbox having a cut down Pentium III. AMD having better APUs is probably part of the reason why Intel isn't in it. If say ARC becomes very good in the future, maybe.

 

[IntelUser2000]

I don't really mind the I/O it really doesn't take that much space to be honest. But can't they shrink the SOC tile? What is in there? All of the gains(not much to be honest) by the die shrink are nearly lost by such a huge SOC and GPU Tiles

I talked about that back in Page 639, post #15962,
https://forums.anandtech.com/thread...ure-lakes-rapids-thread.2509080/post-40773596

They are likely moving the media block in the GPU as well. You also forgot to put the PCH size in when comparing the two, since Meteorlake has all.

50mm from the CPU Uncore
15mm2 from the Media
50mm2 for the PCH
Plus expansion of features.

I/O doesn't scale well with process and it's using older processes too.

 

[jpiniero]

I/O doesn't scale well with process and it's using older processes too.

N6 is old?

 

[IntelUser2000]

N6 is old?

When you consider Meteorlake is next year and N5/N4/Intel 4 is the latest.

Also I said "older". 🙂

I believe @Exist50 though when he says Meteorlake will have little desktop presence. So I'd say no on the 8+16. This gives them an opportunity to speed up Arrowlake-S launch as well.

@nicalandia

Down a bit on the page there's also a strange roadmap: https://adoredtv.com/intel-rapidly-getting-worse/

The 4th generation Donahue Pass Optane comes in Emerald Rapids before the 3rd generation Crow Pass. Also, it doesn't show 2P Emerald/Sapphire Rapids, just 4-8s.

If that's the truth, they can introduce Granite Rapids 2S 1H 2024 and 4-8S later in 2024. It would coincidently(or not coincidently) align with the traditional MP chips being later than DP Xeons.

4-8S Sapphire Rapids-->Emerald Rapids-->Granite Rapids
2S Icelake-SP-->Sapphire Rapids-->Granite Rapids

They also said they replaced the core, iirc. Probably upgraded to Lion Cove.

With "10-12%" gain.

 

[jpiniero]

when he says Meteorlake will have little desktop presence.

You kinda can't if you are talking about socketed parts. They could do 65+ W BGA parts like the Tiger Lake B. You need something new for 23/24 desktop that can be high volume, and if that has to be a rebrand of Raptor Lake, that's what it will be.

 

[IntelUser2000]

You kinda can't if you are talking about socketed parts. They could do 65+ W BGA parts like the Tiger Lake B. You need something new for 23/24 desktop that can be high volume, and if that has to be a rebrand of Raptor Lake, that's what it will be.

They could do a Raptorlake Refresh. The BGA parts are much lower volume. Tigerlake desktop is a good analogy.

 

[Exist50]

The switch was probably made towards the end of ‘21 after Pat joined Intel. A more competitive product was needed (including a more advanced process) to counter AMD, Nvidia, and ARM advance. This gave them 3 years to ‘24. That pace is urgent, but perhaps not “break-neck” crazy.

It would be pretty horrifying if that were the case. The last thing you do when a project is unable to meet its scope on schedule is to pile on yet more scope. I can see the risk calculation with a similar process and even updated core, given the importance of Lion Cove, but topology? I mean, at some point you've basically just canceled the old project and made a new one with the old name.

I have doubts on Falcon Shores using the same platform as Granite Rapids. Maybe Granite Rapids HBM?

Maybe not GNR now, but they do seem to be pitching it as combining the CPU and HPC GPU lineups into one package. Would be pretty neat if they pull it off. Big cores, small cores, GPU compute, and maybe other things, all configurable in a unified platform? Sounds like the dream, at least on paper.