Wasn't the WSA term if GF run out of capacity there would be no penalties?
AMD pays if they do not fab at GloFo or under cut GlobalFoundries. GlobalFoundries pays if they do not give AMD the full committed wafer supply. AMD purchases at a lower cost through "competitive market pricing." GlobalFoundries can only pay for committed wafers they failed to provide called decommitted wafers. AMD however pays for all damages that they can cause to GlobalFoundries.
7LP is competitive price-wise against whoever is cheapest in 7nm FinFETs.
22FDX is competitive price-wise against whoever is cheapest in post-28nm "22nm" market. While providing an actual 22nm node; 14nm FDSOI(20nm FDSOI pre-2014), 22nm low BEOL(same as 22nm PDSOI), 28nm high BEOL(same as 28nm nodes).
The WSA amendment is specific to 14nm/7nm. While any node GlobalFoundries produce that isn't listed in the WSA amendment falls under the original WSA. Aka, don't fab 22FDX, gotta pay us. There is a reason why the stacked roadmap;
https://techreport.com/r.x/cpt-forum-13/glofo-roadmap.png
Under this roadmap AMD only had to purchase the highest performing node per generation. All below was waived as it is a single node roadmap with highest performing to lowest performing. (20LPM was superseded by 14LPE(78CPP+/9T) which AMD switched to then converted to 14LPP.
https://1.bp.blogspot.com/-WxBFl14W...530-h299-p-k/GlobalFoundries-14nm-Roadmap.png)
Became the dual-line roadmap;
https://i.imgur.com/hvgvQtJ.png
Under this roadmap AMD has to traverse both roads or pay GlobalFoundries. As it isn't a single node roadmap anymore, etc.
AMD had to buy 12LP, they also have to buy 22FDX and 12FDX, etc.
AMD pays per quarter for example:
-> Q1 2019;
Dresden: 80,000 wafers per month, so up to 240,000 22FDX priced wafers of damage.
Malta: 60,000 wafers per month, so up to 180,000 22FDX priced wafers of damage.
-> Qx 2020;
Chengdu: 65,000 wafers per month, so up to 195,000 22FDX priced wafers of damage.
Dresden* 110,000 wafers per month, so up to 336,000 22FDX priced wafers of damage.
Malta " " "
Micro-Ryzen/Micro-EPYC platform is desirable ->
http://www.eenewseurope.com/news/european-server-project-promotes-arm-fdsoi/page/0/3
^-- 32-core Cortex-A53
https://www.eetimes.com/document.asp?doc_id=1330129
^-- 48-core Cortex-A53
Getting an x86 design to compete is desirable for Euro-market.