New Zen microarchitecture details

[JDG1980]

Are there any hints as to how much improvement Zen+ cores might show, looking at Zen?

Probably ~10% or so IPC improvement. That's about what we've been seeing, on average, each generation for both AMD (BD->PD->SR->XV) and Intel (SB->HW->SKL). It's possible that Zen+ might do a bit better, since it's the first major revision and they may already have some good ideas lined up that just weren't in time to make it into the original.

 

[nismotigerwvu]

Exactly, I imagine there will be a good bit of low hanging fruit on a brand new design.

 

[hojnikb]

I wouldn't expect 10% IPC uplift on the ZEN+. Yes, with faildozer it was possible, because it was sh** to begin with.

 

[Dresdenboy]

I wouldn't expect 10% IPC uplift on the ZEN+. Yes, with faildozer it was possible, because it was sh** to begin with.

There were not only technical or organizational reasons for BD's performance.

But about Zen+: What if AMD deems Zen1 as their new small + efficient all-purpose core with focus on integer performance, and adds more beef to Zen2/Zen+'s FP and L/S unit (256b), making it a bigger brother for HPC like stuff (if tasks aren't easily parallelized for GPUs for example). It will still be a 14nm CPU.

According to L/S unit patents, they worked on something with 3 AGUs for example - could be K12, as David Kanter mentioned once, that K12 might have 10% higher performance due to leaving out the x86 specific stuff and putting in something else instead. BTW he recently stated, that for (split) 256b AVX loads/stores Zen might only use one AGU uop for the address calculation.

 

[CatMerc]

There were not only technical or organizational reasons for BD's performance.

But about Zen+: What if AMD deems Zen1 as their new small + efficient all-purpose core with focus on integer performance, and adds more beef to Zen2/Zen+'s FP and L/S unit (256b), making it a bigger brother for HPC like stuff (if tasks aren't easily parallelized for GPUs for example). It will still be a 14nm CPU.

According to L/S unit patents, they worked on something with 3 AGUs for example - could be K12, as David Kanter mentioned once, that K12 might have 10% higher performance due to leaving out the x86 specific stuff and putting in something else instead. BTW he recently stated, that for (split) 256b AVX loads/stores Zen might only use one AGU uop for the address calculation.

I imagine that's exactly what AMD is doing. Fottemberg of bitsandchips claims that AMD is working on two possible ideas for Zen2 - Either increased clockspeeds and AVX512, or SMT4.

They probably intend to have modified Zen uArches for different customers, being a semi-custom company. Having SMT4 on an all purpose Zen core wouldn't make sense, neither would AVX512. With Zen2, there will probably be general IPC and clockspeeds upticks for the base design, but also options for specific markets based on customer requests. But for first generation Zen, they need to get the base right, over which they'll work on iterating and upgrading.

 

[dacostafilipe]

I'm looking for some known Zen OPN codes to test my decode script.

For now I have those here:

ZD3601BAM88F4_40/36_Y
ZD3201BBM4KF4_34/32_Y
ZD3301BBM6IF4_37/33_Y
ZD3406BAM88F4_38/34_Y

If you have others, please post them here or PM me.
Thanks!

 

[The Stilt]

I'm looking for some known Zen OPN codes to test my decode script.

For now I have those here:

ZD3601BAM88F4_40/36_Y
ZD3201BBM4KF4_34/32_Y
ZD3301BBM6IF4_37/33_Y
ZD3406BAM88F4_38/34_Y

If you have others, please post them here or PM me.
Thanks!

ES / Prototype SKUs have different encoding than retail SKUs.
The ES SKUs are pretty self explanatory, however nobody so far has managed to decode it entirely correct.
The encoding will become clear when the reviews on retail SKUs will be out.

 

[hojnikb]

There were not only technical or organizational reasons for BD's performance.

But about Zen+: What if AMD deems Zen1 as their new small + efficient all-purpose core with focus on integer performance, and adds more beef to Zen2/Zen+'s FP and L/S unit (256b), making it a bigger brother for HPC like stuff (if tasks aren't easily parallelized for GPUs for example). It will still be a 14nm CPU.

According to L/S unit patents, they worked on something with 3 AGUs for example - could be K12, as David Kanter mentioned once, that K12 might have 10% higher performance due to leaving out the x86 specific stuff and putting in something else instead. BTW he recently stated, that for (split) 256b AVX loads/stores Zen might only use one AGU uop for the address calculation.

Unless the beef is already there in the die, i doubt it's going to make it to Zen+. Maybe ZEN2. I bet it's just going to be a tweak of existing die to fine tune some stuff left out for zen

 

[dacostafilipe]

ES / Prototype SKUs have different encoding than retail SKUs.
The ES SKUs are pretty self explanatory, however nobody so far has managed to decode it entirely correct.
The encoding will become clear when the reviews on retail SKUs will be out.

Yeah, I've seen codes like "YD180XBCM88AE" online, but I have no idea how to decode those correctly.

Well, I'll certainly update the script when Ryzen releases

 

[CatMerc]

https://videocardz.com/66089/biostar-racing-series-motherboard-lineup-for-amd-ryzen-announced

AMD A-series APU / Ryzen CPU / NPU for Socket AM4

???

 

[Glo.]

https://videocardz.com/66089/biostar-racing-series-motherboard-lineup-for-amd-ryzen-announced


???

Its possibly new name, for Ryzen APUs. Similirites can be found in Vega, and the CPU itself, in terms of naming. NCU, Neural-Net...

 

[Dresdenboy]

Unless the beef is already there in the die, i doubt it's going to make it to Zen+. Maybe ZEN2. I bet it's just going to be a tweak of existing die to fine tune some stuff left out for zen

Zen2 = Zen+

So you think what we find in Zen could only be there because it already was in Bristol Ridge or other silicon? How do you think are CPUs being designed?

A tweak could simply be another stepping. They could also tune the process a bit (such a process evolves over time anyway).

 

[Gideon]

https://videocardz.com/66089/biostar-racing-series-motherboard-lineup-for-amd-ryzen-announced
???

Non-Processing-Unit ?

 

[dacostafilipe]

Non-Processing-Unit ?

Neural Processing Unit? HBM2 based APU ?

 

[coercitiv]

Non-Processing-Unit ?

Next Processing Unit. They should have gone the GCN route and called it PUN.

 

[CatMerc]

I guess it would make sense for them to distance Raven Ridge from the name APU, as it is currently associated with pretty weak performance.
A Raven Ridge APU should be quite strong, approching RX 460.

Though I don't believe that's what they'll be doing.

 

[Glo.]

I guess it would make sense for them to distance Raven Ridge from the name APU, as it is currently associated with pretty weak performance.
A Raven Ridge APU should be quite strong, approching RX 460.

Though I don't believe that's what they'll be doing.

In what scenario? 1024 GCN core, 1250 MHz Raven Ridge APU should be between 25 and 75% faster, depending on workload than 1024 GCN core Polaris chip. And IMO, we are not looking at 1250 MHz only Raven Ridge APU. It has much higher throughput, it has much more efficient balancing of the workloads, ending in less stalls on the GPU, therefore bigger efficiency and performance. And desktop NPU will be 16CU design, if it will be around 200mm2.

 

[CatMerc]

In what scenario? 1024 GCN core, 1250 MHz Raven Ridge APU should be between 25 and 75% faster, depending on workload than 1024 GCN core Polaris chip. And IMO, we are not looking at 1250 MHz only Raven Ridge APU. It has much higher throughput, it has much more efficient balancing of the workloads, ending in less stalls on the GPU, therefore bigger efficiency and performance. And desktop NPU will be 16CU design, if it will be around 200mm2.

Raven Ridge leaks point to 11 CU's so far, and don't forget memory bandwidth limitations.
Unless they use HBM2, which I doubt for any consumer APU released in 2017, they can't just cram more CU's.

 

[Tup3x]

Yeah, I've seen codes like "YD180XBCM88AE" online, but I have no idea how to decode those correctly.

Well, I'll certainly update the script when Ryzen releases

As far as I know the available launch SKUs are the following:
AMD RYZEN 7 1700 3.7GHZ 8 CORE 65W SKT AM4 20MB WRAITH SPIRE TRAY IN
YD1700BBM88AE

AMD RYZEN 7 1700 3.7GHZ 8 CORE 65W SKT AM4 20MB WRAITH SPIRE MPK IN
YD1700BBAEMPK

AMD RYZEN 7 1700X 3.8GHZ 8 CORE SKT AM4 20MB 95W TRAY IN
YD170XBCM88AE

AMD RYZEN 7 1700X 3.8GHZ 8 CORE SKT AM4 20MB 95W MPK IN
YD170XBCAEMPK

AMD RYZEN 7 1800X 4.0GHZ 8 CORE SKT AM4 20MB 95W TRAY IN
YD180XBCM88AE

AMD RYZEN 7 1800X 4.0GHZ 8 CORE SKT AM4 20MB 95W MPK IN
YD180XBCAEMPK

sauce

 

[hojnikb]

Zen2 = Zen+

So you think what we find in Zen could only be there because it already was in Bristol Ridge or other silicon? How do you think are CPUs being designed?

A tweak could simply be another stepping. They could also tune the process a bit (such a process evolves over time anyway).

I'm well aware that ZEN is a clean sheet design, but i don't think any drastic changes to the die will be present in the first refresh.

 

[CatMerc]

https://twitter.com/VideoCardz/status/832583990284517381

 

[Glo.]

Raven Ridge leaks point to 11 CU's so far, and don't forget memory bandwidth limitations.
Unless they use HBM2, which I doubt for any consumer APU released in 2017, they can't just cram more CU's.

11CU was about Mobile version of the APU. If it is cut down part, it makes sense. If it is not, it does not make any sense, from technical point of view.
https://twitter.com/CPCHardware/status/831243734130032640
Here is what CPC said about that APU.

And one more thing:
http://www.bitsandchips.it/english/...two-versions-of-raven-ridge-under-development
Yes, they can be wrong, but currently there was too much information about Ryzen, and AMD that there is no point in believing they are wrong on this. Note: Mobile APU has 12CUs. Desktop - 16+HBM2.

 

[piesquared]

I'm looking for some known Zen OPN codes to test my decode script.

For now I have those here:

ZD3601BAM88F4_40/36_Y
ZD3201BBM4KF4_34/32_Y
ZD3301BBM6IF4_37/33_Y
ZD3406BAM88F4_38/34_Y

If you have others, please post them here or PM me.
Thanks!

There is an official OPN decoder available. Saw it last week but can't find it right now.

 

[CatMerc]

11CU was about Mobile version of the APU. If it is cut down part, it makes sense. If it is not, it does not make any sense, from technical point of view.
https://twitter.com/CPCHardware/status/831243734130032640
Here is what CPC said about that APU.

And one more thing:
http://www.bitsandchips.it/english/...two-versions-of-raven-ridge-under-development
Yes, they can be wrong, but currently there was too much information about Ryzen, and AMD that there is no point in believing they are wrong on this. Note: Mobile APU has 12CUs. Desktop - 16+HBM2.

As I said, I wouldn't dismiss the possibility of HBM2 on an APU, but I highly doubt we'll see the 16 CU variant in 2017.
2018 would be the earliest I see AMD releasing an APU with HBM2.

 

[dacostafilipe]

As far as I know the available launch SKUs are the following

Thx.

I'm still missing some information to decode final SKUs (TDP, Stepping, ...) : http://dzencoder.herokuapp.com/?code=YD180XBCM88AE