Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[511]

NVL doesn't use Foveros Direct

https://twitter.com/x/status/1888606938356977681

 

[dttprofessor]

250w，maybe.

 

[ondma]

I am waiting for Igor to leak NVL Performance Projection like they did with arrow lake.

Since the core count is 16P+32E I bet the 32E alone would have greater Multi than ARL-S and 2X over ARL is possible 100K R23?

I hope they don't use DLVR on Desktop there is no need for it on Desktop.

Any guesstimate for ST Performance?

I was at first really excited about this rumor. However, I wonder how they will be able to control temperatures and power consumption. ARL cut power somewhat, but they still approach 250 or 300 watts maxed out with 8p 16e. If there is a 16P Nova Lake, it might not be that great for gaming--- not sure what kind of 1T performance they can get out of that.

 

[igor_kavinski]

If there is a 16P Nova Lake, it might not be that great for gaming--- not sure what kind of 1T performance they can get out of that.

I think their chances are great if they put a low latency (<50 ns) 128MB cache in the SoC tile for 16P Nova Lake. For gaming workloads, the CPU shouldn't consume more than 125W overall. If they can manage at least 15% IPC increase over Lion Cove with guaranteed 5.5 GHz clocks, they may manage to be competitive with Zen 6.

 

[511]

I think their chances are great if they put a low latency (<50 ns) 128MB cache in the SoC tile for 16P Nova Lake. For gaming workloads, the CPU shouldn't consume more than 125W overall. If they can manage at least 15% IPC increase over Lion Cove with guaranteed 5.5 GHz clocks, they may manage to be competitive with Zen 6.

The IPC Estimate should be 20% or more considering we are getting both a Tick (Cougar) and Tock(Panther Cove) and fixing lost IPC From ARL

 

[igor_kavinski]

I'll be satisfied if they get 15% IPC increase and fix the gaming performance. Let's not expect too much from them. They barely got back their fruits and coffee.

 

[Thunder 57]

The IPC Estimate should be 20% or more considering we are getting both a Tick (Cougar) and Tock(Panther Cove) and fixing lost IPC From ARL

I think the days of 20% IPC increases are over inluess it is being compared to a previous architecture that is broken in some way..

 

[511]

I think the days of 20% IPC increases are over inluess it is being compared to a previous architecture that is broken in some way..

Well the ARL architecture was borked so... Also E core team is going to deliver 25% IPC over skymont lol

 

[Thunder 57]

Also E core team is going to deliver 25% IPC over skymont lol

Where's that coming from? I haven't seen any leaks.

 

[MoistOintment]

I think the days of 20% IPC increases are over inluess it is being compared to a previous architecture that is broken in some way..

I'm not gonna even attempt to project IPC gains this early out - but ARL -> NVL is a two generation jump.

 

[Kepler_L2]

I'm not gonna even attempt to project IPC gains this early out - but ARL -> NVL is a two generation jump.

So was RPL -> ARL

 

[Thunder 57]

I'm not gonna even attempt to project IPC gains this early out - but ARL -> NVL is a two generation jump.

What's in between? ARL refresh? If so, then we are just arguing semantics over what a generation actually is.

 

[MoistOintment]

What's in between? ARL refresh? If so, then we are just arguing semantics over what a generation actually is.

Panther Lake. It's just not coming to desktop.

So was RPL -> ARL

And SkMT saw a greater than 20% IPC increase...

 

[Thunder 57]

Panther Lake. It's just not coming to desktop.

Fair enough.

And SkMT saw a greater than 20% IPC increase...

I suggest you read the C&C articles on Skymont and you will realize why it was so successful. It might also make you rethink your position that another huge IPC increase can be done as readily. I'm all for it if they can but I'm not expecting it.

 

[igor_kavinski]

Nova Lake won't have a mont anymore. It will be an Arctic Wolf. The codename change may indicate an entirely different beast.

 

[Kepler_L2]

And SkMT saw a greater than 20% IPC increase...

Yeah with over a doubling of transistor count. N3B -> N2 is only a ~15% density increase, so unlikely they will have such a high IPC gain in a row.

 

[511]

Yeah with over a doubling of transistor count. N3B -> N2 is only a ~15% density increase, so unlikely they will have such a high IPC gain in a row.

Really cause my source is Raichu

https://twitter.com/x/status/1851828922310336518

Just have to dig the tweet

 

[Kepler_L2]

Really cause my source is Raichu

https://twitter.com/x/status/1851828922310336518

Just have to dig the tweet
View attachment 116684

20% sounds believable, I just don't believe they can do Skymont 2.0

 

[511]

20% sounds believable, I just don't believe they can do Skymont 2.0

20% over darkmont which is 4-5% over skymont so 25% over SKT but another skymont seems impossible if they do it though I wouldn't be shocked

 

[511]

Intel Core Ultra 9 285H im MSI Prestige 16 AI Evo im Test

Nach der Vorstellung zur CES ist „Arrow Lake-H“ alias Intel Core Ultra 200H ab sofort verfügbar. Der erste Test im MSI Prestige 16 AI Evo.

www.computerbase.de

ARL-H Review

 

[OneEng2]

I think their chances are great if they put a low latency (<50 ns) 128MB cache in the SoC tile for 16P Nova Lake. For gaming workloads, the CPU shouldn't consume more than 125W overall. If they can manage at least 15% IPC increase over Lion Cove with guaranteed 5.5 GHz clocks, they may manage to be competitive with Zen 6.

Even if so, it will still be behind current X3D and most certainly behind Zen 6 X3D. I think Intel needs an answer to X3D technology that drastically lowers memory latency. The current ARL design already has huge issues in latency. I think they will be doing good just to free up the current design, rather on starting with expectations of Zen 5 and expecting latency improvements so drastic in Nova Lake that it surpasses X3D.

Keep in mind, moving from N3B to 18A is not going to give Intel much additional transistor budget to work with (unlike the move to N3B did).

The IPC Estimate should be 20% or more considering we are getting both a Tick (Cougar) and Tock(Panther Cove) and fixing lost IPC From ARL

... and this is how people got so disappointed by ARL. You take all the little leaks, add up the IPC improvements you see in each change, then sum them all up to get a really big number ..... and then are very disappointed when the product comes out as all these theoretical improvements don't translate into real world performance.

As I stated above, the additional transistor budget expected by 18A over N3B shouldn't be expected to gain much IPC as cache, logic buffers, TLA, front end, execution units, etc, etc, wont likely be afforded much growth.

I expect some good improvements in some applications if Intel can just get their latency under control. Others (that are already doing well on ARL) wont gain much at all.

I think the days of 20% IPC increases are over inluess it is being compared to a previous architecture that is broken in some way..

I agree, because the days of getting 50% higher transistor budget are ALSO over .

 

[511]

We still have CFETs

 

[OneEng2]

If Intel spent 20Bn on GAA with BSPDN, how much do you think it will cost to do CFET with buried power via? It is my understanding that the CFET process will add as many process steps over GAA as GAA did beyond FinFET. Another 20Bn?

The alure of 2x density is a powerful draw though. From what I can read now, it looks like 2030+ for this technology.

 

[511]

If Intel spent 20Bn on GAA with BSPDN, how much do you think it will cost to do CFET with buried power via? It is my understanding that the CFET process will add as many process steps over GAA as GAA did beyond FinFET. Another 20Bn?

The alure of 2x density is a powerful draw though. From what I can read now, it looks like 2030+ for this technology.

It is 2032 from Imec and 20 Billion is the cost of a single fab the R&D is less the main cost are the Fab and first time ramp cost and stuff

 

[Raqia]

Nova Lake won't have a mont anymore. It will be an Arctic Wolf. The codename change may indicate an entirely different beast.

So of the 3-tiered cores, we have Coyote Cove for P-Cores, Arctic Wolf for E-Cores, and there are also the LP-Cores... Are these rumored to also be Arctic wolf derived and sit separately on the SoC tile as with Lunar and Arrow Lake?