Question Zen4c vs E core Die area.

[Abwx]

Meanwhile we are still waiting for the poor man s AM5 APU with 8 Zen 4 cores and a paltry 12CUs GPU...

 

[DrMrLordX]

Wear a spiderman mask!

Only if you're with some chick dressed up like Elsa in the same vid.

Meanwhile we are still waiting for the poor man s AM5 APU with 8 Zen 4 cores and a paltry 12CUs GPU...

That's a market segment AMD continues to neglect. They probably won't change that up anytime soon.

 

[BorisTheBlade82]

That's a market segment AMD continues to neglect. They probably won't change that up anytime soon.

And quite rightly so - this is a negligible segment, after all of their desktop SKUs are APUs now. Apart from some NUC sort of product I would not expect a lot to come.

 

[Joe NYC]

And quite rightly so - this is a negligible segment, after all of their desktop SKUs are APUs now. Apart from some NUC sort of product I would not expect a lot to come.

Speaking of NUCs, I was looking into some AMD based, and I would not mind one that is not a AM5 socket, and has a fast LPDDR5 memory...

 

[Abwx]

And quite rightly so - this is a negligible segment, after all of their desktop SKUs are APUs now. Apart from some NUC sort of product I would not expect a lot to come.

An APU is supposed to have playable framerates, indeed AMD themselves do not brand Raphael as an APU, for sure there are all those mini PCs using Phoenix but as already said these are not upgradable.
Beside an AM5 dedicated Phoenix would make them more money in its 6-8C iterations than 6-8C Raphael, and despite the iGPU being quite potent it is no match for their lowest end dGPUs, so no losses to fear in this register.

 

[Exist50]

And quite rightly so - this is a negligible segment, after all of their desktop SKUs are APUs now. Apart from some NUC sort of product I would not expect a lot to come.

They'll have a big iGPU SoC eventually. It's a pretty compelling offering for the laptop space, and the integration benefit can help them fight against Nvidia's better core competencies.

Edit: typo

 

[Joe NYC]

They're have a big iGPU SoC eventually. It's a pretty compelling offering for the laptop space, and the integration benefit can help them fight against Nvidia's better core competencies.

That sounds about right. I think AMD will start to aggressively grow the capabilities of the GPU portion of laptop chips only when they are ready to transition to chiplets in the segment.

With both Intel and AMD starting to offer chiplets, the low end dGPU chips (mainly from NVidia) will likely start to disappear.

 

[BorisTheBlade82]

An APU is supposed to have playable framerates, indeed AMD themselves do not brand Raphael as an APU, for sure there are all those mini PCs using Phoenix but as already said these are not upgradable.
Beside an AM5 dedicated Phoenix would make them more money in its 6-8C iterations than 6-8C Raphael, and despite the iGPU being quite potent it is no match for their lowest end dGPUs, so no losses to fear in this register.

In whose book is that the definition of an APU? In my book it is simply an SKU where you do not need a dGPU in order for it to function. And that is exactly what most businesses want for their desktops.
Yes, there are SOME people - but it is outright negligible.
And we already discussed the cost topic of Raphael vs. Phoenix (or AMD Chiplet vs. AMD monolith) here at length. There is no explicit truth either way and it is still quite likely, that Raphael might be even or even be in front.

 

[Geddagod]

In whose book is that the definition of an APU? In my book it is simply an SKU where you do not need a dGPU in order for it to function. And that is exactly what most businesses want for their desktops.
Yes, there are SOME people - but it is outright negligible.
And we already discussed the cost topic of Raphael vs. Phoenix (or AMD Chiplet vs. AMD monolith) here at length. There is no explicit truth either way and it is still quite likely, that Raphael might be even or even be in front.

I think for most regular people, an APU is what Abwx said. Sure it may not be 'technically' right, but it's a common definition for an APU.
The definition was prob made popular by the cheap APUs AMD sold, which were great value for budget builds.

 

[jpiniero]

An APU is supposed to have playable framerates, indeed AMD themselves do not brand Raphael as an APU, for sure there are all those mini PCs using Phoenix but as already said these are not upgradable.
Beside an AM5 dedicated Phoenix would make them more money in its 6-8C iterations than 6-8C Raphael, and despite the iGPU being quite potent it is no match for their lowest end dGPUs, so no losses to fear in this register.

Raphael is def cheaper to make than Big Phoenix.

 

[Abwx]

In whose book is that the definition of an APU? In my book it is simply an SKU where you do not need a dGPU in order for it to function. And that is exactly what most businesses want for their desktops.
Yes, there are SOME people - but it is outright negligible.
And we already discussed the cost topic of Raphael vs. Phoenix (or AMD Chiplet vs. AMD monolith) here at length. There is no explicit truth either way and it is still quite likely, that Raphael might be even or even be in front.

AFAIR the first APU was K10.5 Llano based, and it had 400 VLIW SPs, the following products had 512 SPs and this increased up to 768 recently, all theses APUs were branded as gaming capable with perfs displayed in slides, and that s also the case for Phoenix but not for Raphael wich had not a single slide talking of gaming with expected perfs.

An offering in the 100-150$ range for AM5 using the cost efficient 620 chipset is relevant, at one point even 50M$/quarter sales of such products is good to cash, seems that the big money is mainly in big volumes of cheap SKUs, i cant explain otherwise the hit they took in client products sales, eveyone doesnt have 250-300$ to shed on new CPU, particularly in the BRICs like countries.

Raphael is def cheaper to make than Big Phoenix.

Quite possible, but it cost even more to take a 50% hit in client sales, they also have the possiblity to use RMB as cost effective solution, looking at the mini PCs prices it doesnt look that both 6000 and 7000 series APUs are sold at hefty prices.

 

[jpiniero]

An offering in the 100-150$ range for AM5 using the cost efficient 620 chipset is relevant

TSMC too expensive for that.

 

[Markfw]

We really should get back to the subject of this thread, and start another thread if you want to talk about APU's and stuff.

 

[hemedans]

.

 

[igor_kavinski]

In whose book is that the definition of an APU?

It's an "accelerated" processing unit so it better have decent 3D acceleration and that's what they have delivered so far, compared to Intel.

It was also supposed to accelerate our Office tasks with OpenCL, like in LibreOffice but unfortunately, I think it didn't take off, mainly due to Microsoft not feeling the need to have a feature that LibreOffice introduced.

With Zen4c, AMD could pair the low power core with roughly double the amount of GPU execution units than before and combined with DDR5, it would be a very compelling product for the average user.

 

[DrMrLordX]

With Zen4c, AMD could pair the low power core with roughly double the amount of GPU execution units than before and combined with DDR5, it would be a very compelling product for the average user.

Some average users would be pretty disappointed if the target clocks were that low.

 

[igor_kavinski]

Some average users would be pretty disappointed if the target clocks were that low.

I'm sure they could get at least six of those 16 cores to boost to an acceptable level, especially if those cores are not contiguous ones, to avoid the heat density problem.

 

[Abwx]

Some average users would be pretty disappointed if the target clocks were that low.

Bergamo s single and all cores boost is 3.1GHz, guess that Zen 4c should gladly clock up to the 4-4.5GHz region, that would be enough for high efficency and very low cost 8C APUs, it shouldnt be long before we have some numbers about this densfied core clocks capabilities.

 

[jpiniero]

Bergamo s all and single core boost is 3.1GHz, guess that Zen 4c should gladly clock up to the 4-4.5GHz region, that would be enough for high efficency and very low cost 8C APUs, it shouldnt be long before we have some numbers about this densfied core clocks capabilities.

They already have Little Phoenix which is fairly small.

I was thinking that perhaps a Mendochino type product with Zen4c might make some sense, but it might be tough to make it small enough to make it a big enough difference to be worthwhile. This would be 4C+2CU.

 

[dark zero]

That 2 CU is a very bad move, they should gave 2 CU more to deliver decent graphics experience.

 

[Mopetar]

I tried to get to the bottom of this a while back. My observation was, that when comparing two identical CPUs in the same TDP budget, where one has SMT and the other has not, there is almost no power tax for SMT.

SMT is practically free from a power/transistor design perspective, but there are reasons you might not include it.

Probably the biggest reason is that the extra "hyper" thread will share the same cache and anything that's already bottlenecking there will be made even worse as a result, especially if the extra thread is for that same cache-dependent program.

Also, if you're scaling up a smaller core that has a smaller register file, that does make it a lot more likely that the main thread will be able to use a greater percentage of those resources and the extra thread will hurt the efficiency of the main thread.

Since AMD is just making a more compact Zen 4 core it made sense to keep SMT. Intel's E-cores are descendants of their earlier Atom cores. They have smaller L2 caches and smaller reorder buffers and register files. They likely ran the simulations and found that SMT wouldn't gain much or would degrade performance in too many situations.

The other side of things is what the software supports. If it maxes out at 128-threads, then SMT isn't beneficial because every thread can already have its own core to itself. AMD reduced the size of Zen 4 by spending a lot of time on the layout. Intel could certainly do the same, and for something like their E-cores it makes a lot of sense to focus on that more than the raw performance or the clock speed. In the future they might even gain SMT as the cache sizes increase and the cores themselves gain additional resources on the backend.

 

[Bigos]

SMT is practically free from a power/transistor design perspective, but there are reasons you might not include it.

Probably the biggest reason is that the extra "hyper" thread will share the same cache and anything that's already bottlenecking there will be made even worse as a result, especially if the extra thread is for that same cache-dependent program.

Also, if you're scaling up a smaller core that has a smaller register file, that does make it a lot more likely that the main thread will be able to use a greater percentage of those resources and the extra thread will hurt the efficiency of the main thread.

In SMT2, there is no difference between the two threads. There is no "main thread" and "extra thread", both are equal (at least in all SMT implementations that I know about).

I still agree with the point that splitting a thin resource in half might result in sub-optimal scaling. SMT is beneficial either if resources are not used uniformly (but I believe SMT is mostly helpful in embarrassingly-parallel workloads, where all threads execute roughly the same code) or when halving a resource does not halve performance. For the latter, take for example a big ROB, like 512-entry from Golden Cove. Even 256-entry ROB is big, having it twice the size does not double the attainable performance in the vast majority of cases. And it's not like each thread gets exactly half of this ROB - it is allocated competitively between the threads, so if one goes ahead of the other it might use more of it.

Since AMD is just making a more compact Zen 4 core it made sense to keep SMT. Intel's E-cores are descendants of their earlier Atom cores. They have smaller L2 caches and smaller reorder buffers and register files. They likely ran the simulations and found that SMT wouldn't gain much or would degrade performance in too many situations.

The other side of things is what the software supports. If it maxes out at 128-threads, then SMT isn't beneficial because every thread can already have its own core to itself.

These scale-out cores for servers are mostly meant to benefit cloud and VMs. If your software does not scale to X threads, just deploy a number of parallel VMs on the same server to improve utilization. If you cannot, maybe someone else in the same cloud can.

 

[DrMrLordX]

I'm sure they could get at least six of those 16 cores to boost to an acceptable level, especially if those cores are not contiguous ones, to avoid the heat density problem.

Even using Zen4c, it seems unlikely they'd go as far as 16c for a consumer product. Unless that's the smallest they could go.

Bergamo s single and all cores boost is 3.1GHz, guess that Zen 4c should gladly clock up to the 4-4.5GHz region, that would be enough for high efficency and very low cost 8C APUs, it shouldnt be long before we have some numbers about this densfied core clocks capabilities.

That's a bit optimistic. Zen4c in a consumer product would wind up a lot like Carrizo in terms of clocks/FMax.

 

[Abwx]

Even using Zen4c, it seems unlikely they'd go as far as 16c for a consumer product. Unless that's the smallest they could go.


That's a bit optimistic. Zen4c in a consumer product would wind up a lot like Carrizo in terms of clocks/FMax.

Methink that most of frequency limitation would come from the inherently higher thermal gradient due to densification.
Since density is 50% higher it can dissipate only 0.65x the power at same temp.

A Zen 4c core can go up to 30W routinely (on a 5nm node) so a Zen 4c should be capable of about 20W, and not that much would be required in ST for a 4-8C APU, 10-12W is largely enough for middle of the road and low cost APUs.

 

[moinmoin]

Zen 4 added a lot of transistors for seemingly no reason. One theory was that they where added to allow to drive the high frequency achieved. According to that Zen 4c removed those again and as such is closer to the transistor count of Zen 3 and able to realize the area saving from going to the newer node. Going by that Zen 4c likely has a lower hard limit akin to the Zen gens until Zen 3 where it just wasn't possible to exceed a specific frequency no matter the power used.