Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[StefanR5R]

Tangent has left the topic...

Spoiler: mobile client (not) replacing stationary client

No one said you need a physical keyboard, and smart phone users are proof of that statement.

My Surface Pro would like right of challenge to your statement to this.

Oof. Pocket computers, tablets, "desktop replacement laptops"... These are not the same! The latter were discussed.

And keyboards can be virtual,

Now that would be unergonomic to the extreme. Yes, in Star Trek NG they are always typing on glass screens. But you know, they are also never going to bathrooms and such in Star Trek.

Folks. How hard is it to acknowledge that when you make a personal computer mobile, then you necessarily compromise somewhere on the economy/ ergonomics/ feature set/ performance dimensions. To varying degrees, but you always do. It's trivial. And that's why as long as there is a market for client computing, there remains a market for client computing which is not mobile.

 

[fastandfurious6]

Apropos practical reality. You must have missed at least two thirds of my post, if not more. I direct your attention to just the topmost of the several parts of my post:
Even if we restrict ourselves to a PC with the power and performance level of the 7945HX (and which GPU?), your portable computer is a *lot* louder than a decently built stationary computer. Furthermore, keyboard and screen of your portable computer are bolted onto each other and are therefore by definition not ergonomic. Unhealthy in prolonged use.

oh come on bro

ergonomics: laptop wins period. use it as-is or with peripherals monitors keybmouse etc. no questions

performance: 10-30% delta at most, always. that's like 70fps instead of 90fps.

economics: lower or same prices. you can have just 1 computer and take it anywhere you want


again, in the next years this will be a reality: unless you're an enthusiast or a passionate overclocker g4m3r 4k 420fps no scope there will be no point for client desktop PCs.

laptops or workstations (threadripper/epyc)
(still for professional reasons 9950x pcs are easier to find/build than TR/epyc so this is a factor too)

 

[Thibsie]

oh come on bro

ergonomics: laptop wins period. use it as-is or with peripherals monitors keybmouse etc. no questions

No way. Nope.

 

[511]

Am in the wrong thread 🤔

 

[511]

It's not N3e.
Either N3p or N2p/x, depending on the timeline.

No way this is N2P/x those are entering HVM in 2026 this means products in 2027 N3P may be possible cause N3E and N3P is forward compatible

 

[coercitiv]

Am in the wrong thread 🤔

This is the ergonomics forum, are you the guy with the keyboard? Go sit next to the lady with the mouse please, we'll send the boy with the alarm clock when we need you.

 

[511]

This is the ergonomics forum, are you the guy with the keyboard? Go sit next to the lady with the mouse please, we'll send the boy with the alarm clock when we need you.

Yes I am the guy with a broken keyboard I am here for a RMA

 

[fastandfurious6]

I joined 7 months ago and already made 4 prophetic posts that became reality.....

Admins thought my comment about Gelsinger dancing desperately was very offtopic, 2 months later he was 'fired'

Here is another prophecy: the Fall of the Desktop, Crumbling Under the Superior Ergonomics, Economics and Performance/Convenience ratio of the Beast Ultrabook

coming soon to a theater near you, I will make sure to notify you all when it happens

with the prophecy foretold, we can move on from the offtopic the admins will be mad at me again 🤣

 

[Glo.]

No.

The ISA games are compiled into is mostly a non factor. You write in C or whatever and compile it, and it doesn't matter much whether it compiles into x86 or ARM. You might call some libraries or even write a few short assembler sections in tight loops to insure the best SIMD code can be used, that's about it.

The difficulty in writing and porting games is in everything that surrounds that code you write - the OS and GPU drivers. Having competitive ARM SoCs does nothing to help Android games run on Windows.

Absolutely nobody have said anything about scaling Andoid Apps to Windows.

I was talking, for very reasons you mentioned, about scaling Android OS to desktop and laptop form factors.

Vertical integration of Android ecosystem with ARM chips becomes absolutely possible now.

 

[Josh128]

It's not N3e.
Either N3p or N2p/x, depending on the timeline.

Wont be N2 unless its still 3 years out. N3P is possible, but so is N3E. Either way, max frequencies arent going up, and it will bring a ~10% IPC uplift. Most important changes will be in idle power consumption, 12 or 16 core CCX for consumer, memory controller/subsystem/interconnect, iGPU.

 

[CouncilorIrissa]

Wont be N2 unless its still 3 years out. N3P is possible, but so is N3E. Either way, max frequencies arent going up

[citation needed]

 

[511]

[citation needed]

Cited by broken Keyboard owner

 

[Josh128]

[citation needed]

Im talking about consumer Zen 6. It will not use N2. Enterprise will use 2nm for dense just like Zen 5 did. We have the roadmap, it was 100% accurate for Zen 5. The only possible thing that could change is if 2nm gets delayed. Zen 6 +10% IPC. Only mysteries will be what they choose to do with X3D this go round. Mark it.

 

[CouncilorIrissa]

Im talking about consumer Zen 6. It will not use N2. Enterprise will use 2nm for dense just like Zen 5 did. We have the roadmap, it was 100% accurate for Zen 5. The only possible thing that could change is if 2nm gets delayed. Zen 6 +10% IPC. Only mysteries will be what they choose to do with X3D this go round. Mark it.

I'm aware of the slide. It does not say anything about clock speeds.

The slide is also not entirely correct wrt/ Zen 5. There is no low power option (yet at least).

 

[Josh128]

I'm aware of the slide. It does not say anything about clock speeds.

The slide is also not entirely correct wrt/ Zen 5. There is no low power option (yet at least).

Its correct. Depending on what its referring to, which is not entirely clear, there's low power cores in Strix Halo (this is probably what its referring to), low power 5c cores in Strix and Krackan Point, and low power Zen 5c 3nm cores in EPYC.

 

[CouncilorIrissa]

Its correct. Depending on what its referring to, which is not entirely clear, there's low power cores in Strix Halo (this is probably what its referring to), low power 5c cores in Strix and Krackan Point, and low power Zen 5c 3nm cores in EPYC.

No? The official term for 5c is "Dense". You don't need to go further than the Zen 4 roadmap item to verify that.

 

[Josh128]

No? The official term for 5c is "Dense". You don't need to go further than the Zen 4 roadmap item to verify that.
View attachment 115117

there's low power cores in Strix Halo (this is probably what its referring to)
From ChipsNCheese:

So the CCDs that are featured to a first order in the desktop part, they have an actual PHY that connects the two dies. And so there is there's actually a distance that it needs to travel. It's a SERDES and you're able to go some distance between the two. That's how we've always connected the two. And that's a low cost interface, if you will. It is a high bandwidth interface. But that had low power states that could only take it so far. And you had retraining and latency implications every time the chip went down and came back up and so on. So for an always on kind of a desktop kind of machine, that seemed like the best interconnect to connect that as we try to build this into an APU. The first thing we had to do was to change the interconnect between the two dies. And so the CCD that you see here, the core die that you see here, has a different item. That's the first change.

That's a sea of wires. We use fan out, we're for level fan out in order to connect the two dies. So you get the lower latency, the lower power, it's stateless. So we're able to just connect the data fabric through that connect interface into the CCD. So the first big change between a Granite or a 9950X3D and this the Strix Halo always the die to die interconnect. Low power, same high bandwidth, 32 bytes per cycle in both directions, lower latency. So everything that and almost instant on and off stateless because it's just a sea of wires going across. So it's a little [bit of a tradeoff] of course, the fabrication technology is more expensive than the one over there [points to a 9950X3D], but it meets the needs of the customer and the fact that it has to be a low power that can actually connect.

 

[CouncilorIrissa]

there's low power cores in Strix Halo (this is probably what its referring to)

We don't have any official confirmation for that. Mahesh Subramony also gave no indication that those ever existed.

 

[Josh128]

We don't have any official confirmation for that. Mahesh Subramony also gave no indication that those ever existed.

Read above. The CCDs and cores in Halo are different from desktop and enterprise. They are purpose built for low power. The roadmap is correct.

 

[Hitman928]

Read above. The CCDs and cores in Halo are different from desktop and enterprise. They are purpose built for low power. The roadmap is correct.

Your quote says nothing about low power cores.

 

[Josh128]

Yes it does. Do you think they built a completely different CCD if they didnt need to?

And so the CCD that you see here, the core die that you see here, has a different item. That's the first change

 

[igor_kavinski]

AMD's next-gen Threadripper 9000 series to feature 16 to 96 cores, all at 350W TDP

A new leak has revealed key details about AMD’s next-generation Ryzen Threadripper 9000 series, codenamed Shimada Peak. Featuring Zen 5 architecture, the lineup will range from a surprising 16-core variant to a flagship 96-core model, all with a 350-watt TDP prioritizing performance over power...

www.notebookcheck.net

 

[coercitiv]

Yes it does. Do you think they built a completely different CCD if they didnt need to?

You're quoting a typo in the transcript, what he actually said is the following:

And so the CCD that you see here, the core die that you see here, has a different die to die interface. That's the first change.

Timestamp from the video:

Later he goes into more details:

These have the 512 bit data path. It is a full desktop architecture. We have binned the parts for efficiency. So it might not hit the peak frequency that you would see on the desktop. That's one of the second differences in the cores you would find over here and the cores over there.

So these are binned, the same architecture, the same set of pipes, the data parts are the same. The differences are in how we bin the part and how we connect the two dies.

 

[Hitman928]

You're quoting a typo in the transcript, what he actually said is the following:


Timestamp from the video:

Later he goes into more details:

Even without the typo it was clear by the surrounding context they were talking about the d2d connection, but it’s good that the correct transcript says it outright.

 

[Josh128]

Even without the typo it was clear by the surrounding context they were talking about the d2d connection, but it’s good that the correct transcript says it outright.

Die to die connection changes require a new die. This is done for low power, who here is disputing that? Its a new low power core option. You want low power cores, you need that different CCD and die to die connection. Its not mentioned, but probable, that the die to IOD connections differ as well, designed for power savings.

I still maintain that the roadmap is referring to the Strix Halo cores, as they are not C cores, yet can operate at much lower power than standard cores. Y'all dont believe that, fine. If thats not what the roadmap is referring to, its referring to something else that we dont yet know about or was an option they had but decided not to use. The point is, the roadmap is 100% legit and theres zero chance it didnt come from AMD. And while plans can change, there is absolutely no reason to expect more from Zen 6 than what it is projecting.