Discussion RDNA 5 / UDNA (CDNA Next) speculation

[marees]

When we would actually expect to see next-gen Nvidia Rubin or AMD RDNA 5 is surely going to be 2027 at this point - and if RTX 50-series Super is delayed (Nvidia will argue that it hasn't announced anything, therefore there is no delay) and arrives in, say, Q3 2026, we would expect that to push back Rubin until much later into 2027.

Graphics innovation drives the PC gaming market and updates to existing lines could be a long way off, let alone true next-gen upgrades. How long really depends on what 3nm inventory AMD and Nvidia have secured from chip manufacturer TSMC and if memory is available at a reasonable price to make a sizeable roll-out possible.

https://www.digitalfoundry.net/news/2025/12/the-ai-tech-crunch-are-we-looking-at-a-dark-age-for-gaming-hardware

 

[Win2012R2]

and arrives in, say, Q3 2026

It won't because memory prices will be super high at least all of 2026, it's far more sensible for Nvidia to use GDDR7 for their Rubin CPX thingy.

AMD's unique chance is to launch RDNA 5 next year, hope they don't squander it.

 

[basix]

Being stuck with Clamshell the entire generation would be rough.

I'm sure IO is going to be mega expensive on N3... but I would much rather do 256-bit without clamshell to get the extra memory bandwidth.

Well, maybe it is simply not required to have more memory bandwidth:
- Revamped CUs and respective low level caches (bigger capacity)
- Out-of-order execution (increase hardware utilization of ALUs and cache)
- Maybe L0 cache sharing across multiple CUs (reduce wasted SRAM capacity, reduce LLC & DRAM bandwidth requirements)
- Universal compression (smaller memory footprint, reduce bandwidth requirements)
- DGF & DMM (smaller memory footprint, reduce bandwidth requirements)
- Neural techniques like NTC which aim to reduce data fetching from DRAM but rather use more compute from matrix engines (whose performance mostly rely on CU low level caches) to generate or extract data and information
- Work graphs and procedural algorithms with dynamic execution on CU level (reduces code footprints and reduces bandwidth pressure from higher level caches and DRAM)

All those things aim to maximize usage of low level CU resources, increase data locality and reduce load on higher level structures like LLC and DRAM.
It seems that there is much going on regarding rethinking GPU architecture as a whole.

 

[Win2012R2]

What is the usage of 36Gbps memory die beside RDNA5?

It's for Rubin CPX

 

[basix]

As 42 Gbps and 48 Gbps are already announced: Wouldn't Rubin CPX benefit from more bandwidth?

For gaming I do not see bandwidth demands at these levels. 32...36 Gbps seem to be fine on e.g. a 512bit 6090 or AMDs equivalent based on AT0.

 

[adroc_thurston]

As 42 Gbps and 48 Gbps are already announced: Wouldn't Rubin CPX benefit from more bandwidth?

yes and no.
prefill is compute-bound, that's why they're even using an HBMless part anywhere GPGPU.

 

[basix]

Sure, no doubt about that. One of the best overviews you get in this paper: https://arxiv.org/pdf/2410.18038

48 Gbps at 512bit results in 3 TB/s bandwidth. "Big Rubin" with HBM4 will feature 20 TB/s or even more. That is still a huge difference.
There will be cases, where higher bandwidth on Rubin CPX will be beneficial. And when I pay millions for a NVL144 setup, a few Dollars more for faster GDDR7 will not matter regarding overall cost.

 

[marees]

Coming back to this long ago leaked roadmap by wccftech, a few observations:

1. Absolutely no laptop/mobile discrete GPUs. It is all medusa premium/halo if it comes to that
2. No halo desktop part. Does it mean AT0 is strictly for xcloud, professional use cases & not for gaming 🤔
3. RDNA 5 desktop replaces not only N44 but also N33. A big clue of AT4 then. (With AT3 & AT2 positioned above it)

https://twitter.com/x/status/1833491928739930330

 

[adroc_thurston]

Coming back to this long ago leaked roadmap by wccftech, a few observations

this is horribly antique and stuff changed a few times since

 

[RnR_au]

this is horribly antique and stuff changed a few times since

Well it is kinda rude of AMD not to leak a new consumer gpu roadmap. I mean, its Christmas and all...

 

[adroc_thurston]

Well it is kinda rude of AMD not to leak a new consumer gpu roadmap

They were kind enough to not even mention client graphics in the client section of the FAD.

 

[Thunder 57]

They were kind enough to not even mention client graphics in the client section of the FAD.

Not really worth mentioning on FAD, but I guess that was your point.

 

[ToTTenTranz]

Coming back to this long ago leaked roadmap by wccftech, a few observations:

1. Absolutely no laptop/mobile discrete GPUs. It is all medusa premium/halo if it comes to that
2. No halo desktop part. Does it mean AT0 is strictly for xcloud, professional use cases & not for gaming 🤔
3. RDNA 5 desktop replaces not only N44 but also N33. A big clue of AT4 then. (With AT3 & AT2 positioned above it)

https://twitter.com/x/status/1833491928739930330

I'm guessing this is from before AMD regained a bit of trust in the GPU guys thanks to RDNA4 and decided to greenlight AT0 consumer variations.

 

[adroc_thurston]

I'm guessing this is from before AMD regained a bit of trust in the GPU guys thanks to RDNA4 and decided to greenlight AT0 consumer variations.

This has nothing to do with RDNA4 and everything to do with Nvidia.

 

[basix]

I'm guessing this is from before AMD regained a bit of trust in the GPU guys thanks to RDNA4 and decided to greenlight AT0 consumer variations.

AT0 could be used as a Rubin CPX alike SKU. Who knows what the main purpose of that chip is.

 

[Elfear]

AT0 could be used as a Rubin CPX alike SKU. Who knows what the main purpose of that chip is.

Or it could go towards glorious gaming rigs. Give it to us AMD! Give it to the masses!! Maybe if we all say it together? 😄

 

[adroc_thurston]

AT0 could be used as a Rubin CPX alike SKU.

Nowhere near enough matmul for that.