Tachyonism
Junior Member
- Jan 24, 2026
- 3
- 9
- 36
"Patent leak" lol.RGT on L1 cache pooling/sharing & reduced L2 cache & lack of infinity cache
"Patent leak" lol.RGT on L1 cache pooling/sharing & reduced L2 cache & lack of infinity cache
Yes, that’s correct. LLVM has a roughly 6-month release cycle. If AMD misses contributing or integrating for one release, the next official release opportunity would be about 6 months later. So missing a deadline can introduce a half-year delay for official inclusion.i understand LLVM releases are once in 6 months. so if AMD misses this deadline then the next one is 6 months away. is that correct ?
so the question is what did they hope to achieve in these 6 months of H1-2026Yes, that’s correct. LLVM has a roughly 6-month release cycle. If AMD misses contributing or integrating for one release, the next official release opportunity would be about 6 months later. So missing a deadline can introduce a half-year delay for official inclusion.
Perfecting drivers? Only I don't think they committed anywhere near the stuff for this, maybe it's just somebody to collect bonus for shipping LLVM enablement on time and budget.Some testing of hardware ?? why does that need LLVM updates ???
That's just normal compiler enablement schedules.so the target is September 2026 ???
