New Zen microarchitecture details

[Abwx]

So transistors that leak more (I assume you mean Drain-Source leakage) in cutoff state have a lower threshold voltage (Saturation voltage).

Is that unique to FinFETs or is that true for all MOSFETs? I always assumed MOSFETs with a lower threshold voltage had lower RDS(on) as well as lower DS leakage.

That s a general rule for fets/mosfets, RDSon is dependent of the device conductance, if the device conduct more when switched off it will also conduct more (lower RDSon) when switched on.

For a given operating voltage current through the device will rise quasi exponentialy as long as the gate voltage is below threshold, this latter level is the one at wich the exponential evolution has converged to a square law evolution (drain/source current in function of gate voltage).

 

[itsmydamnation]

straight from the horses mouth.
https://youtu.be/24rFeHo1S-o?t=16m47s

 

[PhonakV30]

If I'm not mistaken.
1) Higher leakage ASICs = If Voltage = 1v then 10amp needs to match 10w.
2) Lower leakage ASICs = If Voltage = 2v then 5 amp needs to match 10w.

Muropaketti had RX40 with 87.1% Asic , So this means Card was running at low voltage with very high amp = High Temp = throttle at stock

Right?

 

[The Stilt]

If I'm not mistaken.
1) Higher leakage ASICs = If Voltage = 1v then 10amp needs to match 10w.
2) Lower leakage ASICs = If Voltage = 2v then 5 amp needs to match 10w.

Muropaketti had RX40 with 87.1% Asic , So this means Card was running at low voltage with very high amp = High Temp = throttle at stock

Right?

Roughly so.

 

[Dresdenboy]

I'm no MsEE, but I thought about the new AVFS of Polaris, which seems to be rather similar to CZ/BR's.
THG created this nice chart of the power consumption, which seems to have heavy peaks:

Source

They used HZO55 power probes, which work up to 100 kHz:
https://cdn.rohde-schwarz.com/pws/d...anuals/gb_1/h/hzo/HAMEG_MAN_D_E_F_S_HZO50.pdf
Frequency range: DC to 100kHz (0.5dB)
di / dt response: 20A/μs

For voltage they used HZ355 500MHz probes.

Now I wonder if a delay, phase shift, sampling resolution, etc. of these different ways to measure currents and voltages is good enough to catch the fast switching of Polaris' AVFS.

So my first question is: How fast are these changes in V and F?
Here is some SVI2 related documentation for AMD APUs: http://www.intersil.com/content/dam/Intersil/documents/isl9/isl95712.pdf

Second question: Does this and the way of measuring separate values lead to errors when combining them to get the power?

One idea is to verify the measurement setup by measuring wall power at constant GPU load with a card having slow V/F transitions and repeat that with the RX480.

Albeit it's off topic, I think we have the right experts residing in this very thread.

 

[The Stilt]

The AVFS reaction time is extremely fast (claimed to be < 1ns), however practically the speed of the intervention is limited by the VRM itself. AMD uses top notch digital "Comanche" (IR3567) VRM controller on these cards and the controller can adjust the output voltage at rate of no more than 25mV per 1µs. The actual speed will vary depending on the structure and the configuration of the VRM thou.

If Polaris actually has AVFS enabled I think it is the first AMD product actually using it. AMD has had some fancy stuff in the GPU since Tonga (such as clock stretcher), however neither Tonga or Fiji used it (disabled all the time). Also Carrizo which was the first design to implement AVFS didn't have it enabled, or at least I have never seen it activating, during the ~ year of use.

 

[maddie]

I posted this in the RX480 thread and got no response. You guys here might make some sense of this and offer an explanation. I consider it relevant for the upcoming Zen as this tech will almost certainly be used in it.

These are my thoughts also.

The new power saving tech used might be causing many problems, not only the 14nm node from GloFlo. We might be having conflicts between BTC, AVFS and adaptive clocking. Something very strange is happening when you have a very wide variation in measured power draw between review sites.

From 53W [Hardocp] less than a GTX970 system to 12W more [guru3d]. A 65W measurement spread for a 150W card is HUGE and can't be explained away with traditional reasons.

hardwarecanucks get 24W less
techreport gets 2W more
anandtech gets 12 less
Hardocp gets 53W less
computerbase.de gets 26W less

all of the above use total system power

techpowerup gets 7W more
Toms gets 7W less
guru3d gets 12W more

these do card power

 

[el etro]

^ Great variation of consumption. Getting the ASIC of all of their cards will help better to understand what's going on. Adored TV and bitsandchips get power consumption under of what R380 consumes by some ~20W, which puts the consumption at a very acceptable range. And BTW computerbase and techpowerup reported their samples don't perform at 1266Mhz all the time, computerbase reports is because the RX card limits the power consumption before reach certain power level. All their cards perform closely.

Maybe powertune is just doing his work and power consumption varies from one card to another?

 

[NostaSeronx]

...Also Carrizo which was the first design to implement AVFS didn't have it enabled, or at least I have never seen it activating, during the ~ year of use.

Boop. Not specifically Carrizo, but specifically with Excavator. So, Polaris is the second design to implement AVFS.

&#8220;Excavator&#8221; supports AMD&#8217;s first implementation of adaptive voltage-frequency scaling (AVFS), an improved version of other adaptive voltage approaches. AVFS allows each part to self-calibrate and determine the optimal voltage for current operating frequency and conditions. Timing-margin prediction vs. actual timing margin indicates the ability of AVFS to set the minimum voltage required across the entire voltage range, resulting in up to 30% power savings. The full implementation cost of AVFS is under one percent of the core area. In addition to the area reduction, the &#8220;Excavator&#8221; core has achieved program goals by reducing power versus the previous &#8220;Steamroller&#8221; core by 40%!

((Guys, it says excavator core not excavator module!)) [Triggered]

Each orange blob helps with;

AVFS allows each part to self-calibrate and determine the optimal voltage for current operating frequency and conditions. Timing-margin prediction vs. actual timing margin indicates the ability of AVFS to set the minimum voltage required across the entire voltage range...

 

[Abwx]

The AVFS reaction time is extremely fast (claimed to be < 1ns), however practically the speed of the intervention is limited by the VRM itself.

No, because detection of a voltage drop and voltage correction of this drop
are two different things, the former can be extremely fast while the latter is dependent of the supply switching frequency, for instance a voltage drop can be measured within 10MHz bandwith but if the supply switching frequency is 100KHz then it will require a few 10us cycles to correct the voltage value.

The principle of AMD s AVFS is to reduce frequency accordingly during the voltage drop rather than trying to correct the voltage as there would be an inherent voltage spike that is of the same value as the drop, hence this would be less efficient power wise.

 

[Ajay]

straight from the horses mouth.
https://youtu.be/24rFeHo1S-o?t=16m47s

Excellent - thanks!

 

[NostaSeronx]

The principle of AMD s AVFS is to reduce frequency accordingly during the voltage drop rather than trying to correct the voltage as there would be an inherent voltage spike that is of the same value as the drop, hence this would be less efficient power wise.

That is Steamroller, Adaptive Clocking.

AVFS is best known for its per device voltage calculation;
https://i.imgur.com/niOuEKC.jpg
- Bullet Pt 4 -> Smarter System will adapt operating voltage per device.

Bristol Ridge;
http://i.imgur.com/P4vSuBt.png
http://i.imgur.com/lsfF0Zq.png

 

[CHADBOGA]

When we will get some good performance info?

 

[Phynaz]

Considering how quiet AMD was about Polaris and how that turned out, the silence about Zen doesn't fortell good things.

Of course I've been saying that for a while, so we'll see if I'm correct.

 

[Abwx]

That is Steamroller, Adaptive Clocking.

AVFS is best known for its per device voltage calculation;
https://i.imgur.com/niOuEKC.jpg
- Bullet Pt 4 -> Smarter System will adapt operating voltage per device.

Bristol Ridge;
http://i.imgur.com/P4vSuBt.png
http://i.imgur.com/lsfF0Zq.png

What you linked is something else, it s a dynamic compensation of the transistors static parameters, these are variables with a dependency on waffers quality (wich will yield devices with dispersion in conductance and threshold voltage), operating temperature and voltage.

 

[Ajay]

Considering how quiet AMD was about Polaris and how that turned out, the silence about Zen doesn't fortell good things.

Of course I've been saying that for a while, so we'll see if I'm correct.

Having seen Polaris 10, it seems critical for Zen to come out as late as possible. Not only does the process variability need to be reduced but yields at higher clocks probably needs a significant boost. I wish we had more visibility into GloFlo's 14LPP process. I also sincerely wish Zen was designed using a better process.

 

[DrMrLordX]

Wait, what "process variability"? We're jumping to a lot of conclusions here, no? I have had Hawaii cards develop horrible current leakage problems (which can be addressed somewhat via BIOS modding) during usage, particularly after extended periods of high heat/100% utilization in compute tasks(mining). The GPU quality didn't spontaneously shift during usage, and rather it seems that the VRMs go bad (or partially bad).

Hasn't anyone investigated the possibility that some of the review cards have wonky VRMs?

 

[Abwx]

Wait, what "process variability"?

Dispersion of the transistors characteristics from a waffer to another and even within a same waffer, finfets have significantly more dispersion than planar transistors, whatever the manufacturer..

 

[Ajay]

Wait, what "process variability"? We're jumping to a lot of conclusions here, no? I have had Hawaii cards develop horrible current leakage problems (which can be addressed somewhat via BIOS modding) during usage, particularly after extended periods of high heat/100% utilization in compute tasks(mining). The GPU quality didn't spontaneously shift during usage, and rather it seems that the VRMs go bad (or partially bad).

Hasn't anyone investigated the possibility that some of the review cards have wonky VRMs?

VRM problems could be at work here, but that's a different issue. The variation is ASIC quality, as Abwx just noted - is even more a problem w/FinFets and is an issue also pointed out by others above. There are additional hints that GF is having problems with it's 14LPP process node. No particulars - hence my complaint about the lack of visibility in exactly what is going on at GF (if we still have industry insiders here, they are not talking) - so I certainly could be wrong about the state of 14LPP.

The problem AMD faces, is that it has much to prove. AMD's FAB, Global Foundries, doesn't have a great record of pulling through for them in a timely manner.

 

[Elixer]

I also sincerely wish Zen was designed using a better process.

There are just too many unknowns at work here.
We are all trying to guess why GloFlo's 14nm LPP is subpar to what should have been a much lower power design.
Yes, something is wrong, could be die size + 14nm LPP, could be material, could be faulty design by AMD, could be the 14nm process itself, and on and on. We just don't know.

At this point, looking at the 480, it seems Zen will be lower speeds, and higher temps and nobody wants that, we need strong competition.

AMD won't say anything yet, we need to wait for the 'quiet period' to expire to get a glimpse of what is going on.

 

[itsmydamnation]

At this point, looking at the 480, it seems Zen will be lower speeds, and higher temps and nobody wants that, we need strong competition.

AMD won't say anything yet, we need to wait for the 'quiet period' to expire to get a glimpse of what is going on.

They already did comment on it and i posted a damn link in this thread like a day ago........

 

[The Stilt]

No, because detection of a voltage drop and voltage correction of this drop
are two different things, the former can be extremely fast while the latter is dependent of the supply switching frequency, for instance a voltage drop can be measured within 10MHz bandwith but if the supply switching frequency is 100KHz then it will require a few 10us cycles to correct the voltage value.

The principle of AMD s AVFS is to reduce frequency accordingly during the voltage drop rather than trying to correct the voltage as there would be an inherent voltage spike that is of the same value as the drop, hence this would be less efficient power wise.

This time you are absolute correct

I must admit that I'm not too familiar with AVFS.

If AVFS operation requires releasing and re-engaging the Pll locking (which I expect it does), I would say the minimum delay for AVFS operation is actually around 2µs. That's the Pll lock time on Excavator (200 x 10ns) designs and Polaris appears to be using almost identical PM.

 

[Phynaz]

They already did comment on it and i posted a damn link in this thread like a day ago........

You can't expect people to click on a youtube link without some explanation of what they are going to see. I imagine most people just ignored your post. I did.

 

[DrMrLordX]

VRM problems could be at work here, but that's a different issue. The variation is ASIC quality, as Abwx just noted - is even more a problem w/FinFets and is an issue also pointed out by others above.

Actually I've seen quite a bit of variation in Hawaii ASIC quality as well, ranging from the high 60s to the low 80s. The Sapphire Vapor-X 290s I have are pretty awful.

AMD's FAB, Global Foundries, doesn't have a great record of pulling through for them in a timely manner.

That's generally true. Though they have done some nice things refining 32nm SOI and their 28nm processes lately. Sort of.

Yes, something is wrong, could be die size + 14nm LPP, could be material, could be faulty design by AMD, could be the 14nm process itself, and on and on. We just don't know.

Something seems to be wrong with power delivery based on clockspeed. Clocking up memory on the 480 seems to jack up power usage by quite at bit, at least for some users anyway.

 

[Elixer]

They already did comment on it and i posted a damn link in this thread like a day ago........

Eh?
I am talking about the 14nm process overall, I am not talking about power draw of the 480, that is an entirely different subject.
As I said, they can't talk about it right now, we have to wait for the SEC to release them, then, we can get a glimpse of what is going on by the documents they filed.

Something seems to be wrong with power delivery based on clockspeed. Clocking up memory on the 480 seems to jack up power usage by quite at bit, at least for some users anyway.

From what I read, they need to boost power by around X% to make sure the product lasts X number of years. The lower quality yields need even more power delivered to them to stay at the same clock rate.
This is, by far, the biggest chip that has come out of the 14nm process so far. All previous ones using 14nm were more than 2x smaller.