Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

TSMC Radically Boosts CapEx to Expand Production Capacities, To Reach $14B For 2019

www.anandtech.com

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

Samsung’s Aggressive EUV Plans: 6nm Production in H2, 5nm & 4nm On Track

www.anandtech.com

Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE

 

[Geddagod]

Yeah for all the crap I give people who unquestioningly believe Intel will execute on their very aggressive roadmap (despite already deviating from it with Intel 4...) I give them far far more credit at this point than Samsung.

Have you heard about Samsung's foundry internal corruption scandals as well? It's wild

 

[coercitiv]

Tenstorrent will be working with Samsung for their AI chiplet, using SF4X:

Tenstorrent Selects Samsung Foundry to Manufacture Next-Generation AI Chiplet | Tenstorrent

Tenstorrent, a company that sells AI processors and licenses AI and RISC-V IP, announced today that it selected Samsung Foundry to bring Tenstorrent’s next generation of AI chiplets to market.

tenstorrent.com

 

[Thibsie]

Yeah for all the crap I give people who unquestioningly believe Intel will execute on their very aggressive roadmap (despite already deviating from it with Intel 4...) I give them far far more credit at this point than Samsung. At least Intel is dealing honestly with node names.

Agreed.
Well, Intel isn't as honest as before although we'll all agree that they really only did adapt to TSMC dishonesty if I can put it that way.

 

[NostaSeronx]

Tenstorrent will be working with Samsung for their AI chiplet, using SF4X:

Tenstorrent Selects Samsung Foundry to Manufacture Next-Generation AI Chiplet | Tenstorrent

Tenstorrent, a company that sells AI processors and licenses AI and RISC-V IP, announced today that it selected Samsung Foundry to bring Tenstorrent’s next generation of AI chiplets to market.

tenstorrent.com

Groq also hopped but more early on as well: https://www.koreaherald.com/view.php?ud=20230816000112

Both Tenstorrent and Groq appear to mainly producing at Taylor in 2025. It also has support for 3nm GAA:

 

[Geddagod]

Heh, wonder if TSMC's and Samsungs's "X" nodes are just Intel's "normal" node.

 

[DrMrLordX]

Intel.

TSMC’s N2P isn’t due until 2026.

I'm highly, highly, highly skeptical that IFS 2.0 will be ready to compete with that by 2026.

 

[lightisgood]

Snapdragon 8 Gen 4 Suffers From Power Consumption Woes, But Qualcomm Has Plenty Of Time To Address These Issues

The Snapdragon 8 Gen 4 power consumption problems are mentioned in the latest rumor, but Qualcomm has time to address them

wccftech.com

Snapdragon 8 Gen 4 is suffering from a disappointing N3E power consumption.
I'm sure that the getting a late start in GAA and BS-PDN must take away TSMC's process leadership.

 

[Geddagod]

Snapdragon 8 Gen 4 Suffers From Power Consumption Woes, But Qualcomm Has Plenty Of Time To Address These Issues

The Snapdragon 8 Gen 4 power consumption problems are mentioned in the latest rumor, but Qualcomm has time to address them

wccftech.com

Snapdragon 8 Gen 4 is suffering from a disappointing N3E power consumption.
I'm sure that the getting a late start in GAA and BS-PDN must take away TSMC's process leadership.

Quoting the article you linked:

The Snapdragon 8 Gen 4 is reportedly Qualcomm’s first SoC entrant that will ditch ARM’s core designs and switch to custom Oryon cores that have been codenamed Phoenix.

At this stage, we cannot conclude if TSMC’s N3E process or Qualcomm’s desire to raise the performance target of the Snapdragon 8 Gen 4 are the culprits here, but with the Snapdragon 8 Gen 3 launch said to happen later this month, the focus will be placed on this year’s silicon. Even the Snapdragon 8cx Gen 4, which is also said to feature the same Oyron cores, Qualcomm is said to be running into undisclosed problems.

Idk why everyone is hating on TSMC N3. Have you guys seen the new A17 P-core block diagram? The upgrades in the core aren't insignificant, and the tiny IPC uplift is squarely on Apple, and I suspect the poor perf/watt is on Apple as well, not TSMC

 

[Doug S]

Agreed.
Well, Intel isn't as honest as before although we'll all agree that they really only did adapt to TSMC dishonesty if I can put it that way.

Intel's node names were dishonest before, they just made them a little more dishonest to line up with TSMC's naming. FinFET transistors are made differently, the old naming was obsolete - they would have had to go up in naming if they wanted to continue to measure it the same way.

Everyone followed roughly where the path would be if they were still using planar transistors, i.e. a sqrt(2) decrease in node name for a new process which was approximately doubling transistors per mm^2. Unfortunately that's fallen apart the last few nodes, they aren't doubling transistor counts (even for logic, but especially for cache)

The only point to the node naming now is for comparisons, so Intel lining up with TSMC is a good thing. Hopefully Samsung will get in line too. It is hard to see what the point of trying to cheat on node names is. It isn't as if it is something marketed at end users - those who are buying wafers know where Samsung's processes really stand.

 

[H433x0n]

Quoting the article you linked:


Idk why everyone is hating on TSMC N3. Have you guys seen the new A17 P-core block diagram? The upgrades in the core aren't insignificant, and the tiny IPC uplift is squarely on Apple, and I suspect the poor perf/watt is on Apple as well, not TSMC

Tiny IPC uplift is 100% on Apple. The perf/watt at least some of the blame is on TSMC. There’s a reason why N3B is a year late and it’s being deprecated so fast and it’s not because of its great performance and yield.

 

[SpudLobby]

Tiny IPC uplift is 100% on Apple. The perf/watt at least some of the blame is on TSMC. There’s a reason why N3B is a year late and it’s being deprecated so fast and it’s not because of its great performance and yield.

I think it is both but fwiw you're too pessimistic RE: Intel and N3B. Parametric yields will be worse on N3B than with N3E, but they'll also probably improve some by the time LNL, ARL are in mass production. You can't really look at N3B and just decide it's x value worse than N4/N4P yet in part because yields are going to be variable inherently in the case that TSMC have put themselves in, though certainly on average worse on power sure.

But at any rate we're going to get to see an A17 on N3E most likely which will settle some things.

 

[SpudLobby]

Yeah for all the crap I give people who unquestioningly believe Intel will execute on their very aggressive roadmap (despite already deviating from it with Intel 4...) I give them far far more credit at this point than Samsung. At least Intel is dealing honestly with node names.

OK granted all the node names are a fantasy when it comes to physical dimensions, but since TSMC has been the leader for the past 4-5 years their node names are kind of the anchor point. If you want to name less aggressively (i.e. produce a "5" that's better than TSMC's "4") no one will complain, but when you have a "4" that's worse than TSMC's "7" you are straight up lying. Heck at this point I wouldn't be totally shocked if Samsung's "3" wasn't even GAA and they lied about too so they can claim they are ahead of everyone else.

Agree but disagree. Samsung's 4NM LPX was a Qualcomm thing, e.g. they wanted a 4NM node. Samsung doesn't even advertise that.

At any rate yeah Samsung did sort of push the arms race. We'll see if 4NM LPE/LPP have finally come around to something TSMC-caliber with the Tensor G3.

 

[SpudLobby]

It’s impossible to judge a Samsung node by its label. There’s multiple instances of Samsung 4Lx nodes being outperformed by TSMC N6 that their naming scheme has lost all meaning.

There’s also multiple instances where they get comparable density to TSMC N5 but the performance is completely crap since the yield is so poor.

Yeah I mean again: 4NM LPX is 5NM. And their 5NM is meaningfully different from their 4NM unlike TSMC's primarily optical shrink with N4 vs N5.

Samsung 4nm is the real deal, they're one that should come much closer to 5NM on density, EUV layers and power/performance.

Yields still sucked though which we saw with the Exynos 2200.

But I think given reports they've improved, Tensor G3 is the best shot we'll have to see - comparing it to the 8 Gen 2 and D9200 will give us a general direction as to how Samsung's fabs are doing on 4NM.

 

[SpudLobby]

The Korean leaker guy is an idiot yeah. There are decent ones but not him. He's not all there.

 

[SpudLobby]

He believes Samsung 3nm is better than TSMC 3nm.

SF3 (3GAP) > N3E
SF3P (3GAP+) > N3P

Big Doubt. I want to see Samsung 4NM LPE/LPP match TSMC's N4/N5 on power/performance. Google seems to be clocking the Tensor G3 lower than the 8 Gen 2 so that could be a bad sign but they have divergent priorities and their marketing isn't heavily dependent on that the way QC and MediaTek are.

 

[SpudLobby]

Even if everything else works out smoothly I highly doubt that Intel could deliver the quantity desired by TSMC's biggest customers to actually displace TSMC as the leading foundry.

I hate that we have to keep going over this but again, yes. The thing about N5 in particular and N7 were TSMC hit great density targets and kept parametric and catastrophic yield to a seemingly phenomenal level.

And they launched with tens of millions of smartphone SoC dice each time, if not hundreds really.

 

[Ajay]

if not hundreds really.

N7 & N5, Probably closer to 1B. Never mind all the AMD chiplets and both major GPU maker's ASICs. Crazy huge FABS.

 

[FlameTail]

Big Doubt. I want to see Samsung 4NM LPE/LPP match TSMC's N4/N5 on power/performance. Google seems to be clocking the Tensor G3 lower than the 8 Gen 2 so that could be a bad sign but they have divergent priorities and their marketing isn't heavily dependent on that the way QC and MediaTek are.

Hope Geekerwan gets their hands on the Tensor G3 and gives it their customary treatment.

Then it will be clear.

 

[Geddagod]

The perf/watt at least some of the blame is on TSMC.

I don't think so. The core only gaining such a small IPC uplift seems to be the culprit of poor perf/watt in general. I'm guessing Apple targeted a certain amount of performance, and thought they could achieve it by mostly IPC. However when IPC turned out to not improve much, they pushed clocks higher to get there. But that's just head cannon.

There’s a reason why N3B is a year late and it’s being deprecated so fast and it’s not because of its great performance and yield

Yield is bad, not perf

 

[Thibsie]

It is hard to see what the point of trying to cheat on node names is. It isn't as if it is something marketed at end users - those who are buying wafers know where Samsung's processes really stand.

It is not marketed to end users indeed. Just to the board, analysts and other idiots who often do not have any clue about technical subjects.

 

[capricornsunvoyager2]

Hope Geekerwan gets their hands on the Tensor G3 and gives it their customary treatment.

Then it will be clear.

I agree. Heck, I would like the Samsung 4nm to succeed, but I'm not very optimistic about its prospects. Even with the relatively new X3 core, the Tensor G3 doesn't seem to be much different from the G2 in performance. I just hope that Samsung can demonstrate some improvement in efficiency.

 

[SpudLobby]

N7 & N5, Probably closer to 1B. Never mind all the AMD chiplets and both major GPU maker's ASICs. Crazy huge FABS.

Was thinking about the first year which for intel is nothing like TMSC ramp (maybe that will change though!) but yes absolutely overall.

 

[SpudLobby]

Hope Geekerwan gets their hands on the Tensor G3 and gives it their customary treatment.

Then it will be clear.

Precisely. Looking forward to it more than the 8 Gen 3 or Dimensity Next Gen at this point because it’ll come sooner and it’ll bode well for competition both via SS and Google if it looks alright.

 

[SpudLobby]

I agree. Heck, I would like the Samsung 4nm to succeed, but I'm not very optimistic about its prospects. Even with the relatively new X3 core, the Tensor G3 doesn't seem to be much different from the G2 in performance. I just hope that Samsung can demonstrate some improvement in efficiency.

The X3 is a huge jump from the X1 though, and the four A715s if scheduled for background tasks properly will be a significant jump on performance/watt and energy efficiency vs the two A78’s and the two X1’s + four A55’s.

Remember for Google they used two X1’s and those X1’s are probably less energy efficient than newer A715’s on whole SoC power for some modestly clocked stuff. They’re going from 2 X1, 2 A78 to 1 X3, 4 A715, I do think we should see a jump in energy efficiency across the board from IP alone — background tasks will no longer need to be on an A55 or X core.

 

[FlameTail]

CEO of research firm reveals what he says is the big secret behind the Kirin 9000S chipset

The CEO of a research firm tells the South China Morning Post that the Kirin 9000S was built on SMIC's 14nm node.

www.phonearena.com

Legit or load of hogwash?