Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

Golden Member
Mar 3, 2017
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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.

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N7 performance is more or less understood.
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This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.


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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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Markfw

Moderator Emeritus, Elite Member
May 16, 2002
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It isn't exactly a rail system but I think it is a lot more interesting.
Since this video, they completed a large expansion of D1 and have another one planned supposedly.

D1 in Oregon is indeed both development and HVM.
One building alone is bigger than 12 football fields and 10 stories high. Thats not a big building ????
 

eek2121

Diamond Member
Aug 2, 2005
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Actual xtor densities are always lower than FAB specs. Too lazy atm to to compare those three SoCs.
I am aware of that, but they aren’t even coming close, even with internal testing stuff.

When Intel 4/3/20A/18A mature and are open to IFS, TSMC is going to have quite a competitor. Intel had been courting major TSMC clients for a while now, and unlike TSMC, Intel is willing to sacrifice a bit of margin to grow business.

With a caveat that it’s only for the HP library. TSMC’s N3B HD library is supposed to be more dense than Intel 3 (Intel 4 doesn’t include an HD library).
You can’t compare HP and HD libraries, they are designed for different purposes.
N3B is turning out to be a bit of a dud, but TSMC has done pretty well otherwise since N7.
Unless they have N2 ready to go by end of next year, they are most certainly NOT doing pretty well. They are about to lose market leadership, and competition on non-leadership nodes is ramping up.

They have had a few different delays, and it is adding up. The N3 stuff is simply ridiculous, especially given the pricing.

Intel is going to eat their lunch if they don’t become more aggressive. SMIC as well. I also hear rumblings of Samsung planning a turnaround post-NVIDA.

Shoot, if Intel snagged Apple, AMD, and NVIDIA, TSMC would be quite in a bit of trouble, and while you may not think this could happen, it could, and it is closer to reality than you think.
 

DrMrLordX

Lifer
Apr 27, 2000
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Unless they have N2 ready to go by end of next year, they are most certainly NOT doing pretty well.

Uh okay, wait and see? Meanwhile N7, N7P, N7+, N6, N5, N4, N4P, and other nodes not mentioned here did just fine. N4P dominated. The only node that technically exceeds it is N3B.

Intel 3 may be a decent alternative eventually. We will see how that situation shapes up by the time IFS brings someone's products to the general market.


They are about to lose market leadership

What? To whom? Samsung?
 

Thibsie

Golden Member
Apr 25, 2017
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Intel.

TSMC’s N2P isn’t due until 2026.
Process performance and maturity is one thing. Operating as a foundry is another one. I'm still not convinced Intel learned a thing.
I hope they did, we all need competition in this business.
As for Samsung, they are vaporware until further notice IMO
 

Doug S

Diamond Member
Feb 8, 2020
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Unless they have N2 ready to go by end of next year, they are most certainly NOT doing pretty well. They are about to lose market leadership, and competition on non-leadership nodes is ramping up.

Based on what? Intel's promises about 18A? When did Intel say Intel 4 would be ready? It has been announced mass production began for it this week - Q4 2023. Products containing Intel 4 CPUs won't ship until 2024. But suddenly TSMC has to have N2 ready in 15 months or it is behind? You sure put a lot of stock in Intel's promises. More than is warranted, that's for sure.
 

H433x0n

Golden Member
Mar 15, 2023
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Based on what? Intel's promises about 18A? When did Intel say Intel 4 would be ready? It has been announced mass production began for it this week - Q4 2023. Products containing Intel 4 CPUs won't ship until 2024. But suddenly TSMC has to have N2 ready in 15 months or it is behind? You sure put a lot of stock in Intel's promises. More than is warranted, that's for sure.
It was last week they did a big presentation on Intel 4 hitting HVM status (so technically they did achieve it by end of Q3). Realistically it was done a while ago since before it gets to this point it has to have requisite yield at Oregon before being exported to another fab. It takes months to setup and transplant all required processes. It’s a big undertaking to pull that off - as far as I know only Intel exports their leading edge processes out of the country to a satellite fab.
 

jpiniero

Lifer
Oct 1, 2010
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It was last week they did a big presentation on Intel 4 hitting HVM status (so technically they did achieve it by end of Q3). Realistically it was done a while ago since before it gets to this point it has to have requisite yield at Oregon before being exported to another fab. It takes months to setup and transplant all required processes. It’s a big undertaking to pull that off - as far as I know only Intel exports their leading edge processes out of the country to a satellite fab.

Samsung has had fabs in Texas for years. And Intel's been fabbing in Ireland for a long time too.
 

H433x0n

Golden Member
Mar 15, 2023
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Samsung has had fabs in Texas for years. And Intel's been fabbing in Ireland for a long time too.
Those aren’t leading edge nodes. As far as I know both TSMC and Samsung are not operating leading edge nodes w/ EUV outside of Taiwan and South Korea.
 

Doug S

Diamond Member
Feb 8, 2020
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What is he wrong about? Doesn't an overheating chip mean it's getting overvolted or getting pushed to too high a frequency?

Let's list them:

1. Samsung foundry won the race to 3nm
2. FinFET limit is 4nm
3. N3B transistors are too small .. for performance
4. even in 4nm 10-20% transistors are dead/faulty (if so yield would be ZERO)
5. dead transistors are like clogged tunnel delivering too much power than the pipes can handle (WTF?)
6. Apple's fault for shrinking the chip further [ referencing die size of A17P being smaller than A16 ]

I'm bored, I'll let you find the rest.
 

FlameTail

Diamond Member
Dec 15, 2021
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He believes Samsung 3nm is better than TSMC 3nm.

SF3 (3GAP) > N3E
SF3P (3GAP+) > N3P
 
Jul 27, 2020
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Let's list them:

1. Samsung foundry won the race to 3nm
2. FinFET limit is 4nm
3. N3B transistors are too small .. for performance
4. even in 4nm 10-20% transistors are dead/faulty (if so yield would be ZERO)
5. dead transistors are like clogged tunnel delivering too much power than the pipes can handle (WTF?)
6. Apple's fault for shrinking the chip further [ referencing die size of A17P being smaller than A16 ]

I'm bored, I'll let you find the rest.
Disclaimer: I know nothing.

1. Samsung foundry won the race to 3nm
Yeah, I figured he must be some Korean groupie.

2. FinFET limit is 4nm
What's the limit?

3. N3B transistors are too small .. for performance
Isn't he saying they would heat up too quick?

4. even in 4nm 10-20% transistors are dead/faulty (if so yield would be ZERO)
Maybe he means dead silicon and CPU designs do have redundant pathways, right?

5. dead transistors are like clogged tunnel delivering too much power than the pipes can handle (WTF?)
Yeah I see he's confused here.

6. Apple's fault for shrinking the chip further [ referencing die size of A17P being smaller than A16 ]
Maybe he's saying that A16 had some problems that got magnified with A17P's shrinkage?
 

FlameTail

Diamond Member
Dec 15, 2021
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I guess Samsung had a chance to gain process leadership but they fumbled the timeliness. They have said will bring 3nm GAAFET for years, but how many times has it been delayed now?

So 3GAP (Exynos 2500) comes in late 2024, same time as N3E (A18 Pro, SD8G4).

And then 3GAP+ (Exynos 2600) in late 2025, same time as N3P (A19 Pro, SD8G5).
 

H433x0n

Golden Member
Mar 15, 2023
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So according to you guys' credible sources, TSMC 3nm >> Samsung 3nm?
It’s impossible to judge a Samsung node by its label. There’s multiple instances of Samsung 4Lx nodes being outperformed by TSMC N6 that their naming scheme has lost all meaning.

There’s also multiple instances where they get comparable density to TSMC N5 but the performance is completely crap since the yield is so poor.
 

Doug S

Diamond Member
Feb 8, 2020
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It’s impossible to judge a Samsung node by its label. There’s multiple instances of Samsung 4Lx nodes being outperformed by TSMC N6 that their naming scheme has lost all meaning.

There’s also multiple instances where they get comparable density to TSMC N5 but the performance is completely crap since the yield is so poor.


Yeah for all the crap I give people who unquestioningly believe Intel will execute on their very aggressive roadmap (despite already deviating from it with Intel 4...) I give them far far more credit at this point than Samsung. At least Intel is dealing honestly with node names.

OK granted all the node names are a fantasy when it comes to physical dimensions, but since TSMC has been the leader for the past 4-5 years their node names are kind of the anchor point. If you want to name less aggressively (i.e. produce a "5" that's better than TSMC's "4") no one will complain, but when you have a "4" that's worse than TSMC's "7" you are straight up lying. Heck at this point I wouldn't be totally shocked if Samsung's "3" wasn't even GAA and they lied about too so they can claim they are ahead of everyone else.