It is all i have seen is layoff news for managers and software but not in foundry i have not seen process engineers and other stuff in any listNo? Foundry isn't being left anywhere that way(in terms of lay-offs).
Fab has sizable lay-offs plus some left because of continuous lay-offs.It is all i have seen is layoff news for managers and software but not in foundry i have not seen process engineers and other stuff in any list
well don't forget they cut most of the marketing department as wellFab has sizable lay-offs plus some left because of continuous lay-offs.
Back in June/July there were reports of significant cuts in Foundry workers, reportedly Naga(in June) had issued internal letter regarding this. Some of the fab-related lay-offs got confirmed later.
As for lay-offs many sections of Intel had cuts.
At some level Intel's narrative focused on portraying"we are just getting rid of unnecessary managers" is nonsense when you are firing tens of thousands of guys.
Altera count was done(after divestiture) but there's also argument that it was sold during FPGA down-cycle and might have got lot better value if they could hold and try selling later.On the layoffs I forgot Altera and Mobileye also had their employee count removed from Intel
Tan is looking to right size company and cut products that don't make money he might go too far but cost cutting was needed.As far as Intel's lay-offs are concerned they are still continuing. They have indicated to get the headcount even lower by the year-end.
Some level of it was required and was also done previously(for eg. last year) but they are overdoing it. Seemingly continuous lay-offs that is going on is bad. RTO mandate along with inflexible shifts(more time) is stupid, AMD/Nvidia aren't doing this. There are good people leaving for other places cause of uncertainty(to their projects or employees that work under) and inflexibility.Tan is looking to right size company and cut products that don't make money he might go too far but cost cutting was needed.
Tan is looking to right size company and cut products that don't make money he might go too far but cost cutting was needed.
Intel was bloated for real and has so many wasteful stuff it's not funnyThe only people I can think of that like the phrase "right size" is the C Suite and Wall Street.
That may be true however the phrase "right size" reveals one to be a yuppie alien like in They Live (1988). But we don't even need magic glasses to see it.Intel was bloated for real and has so many wasteful stuff it's not funny
i don't even know the reference lmao
Good Riddance he has mixed reviews![]()
Intel's AI chief Sachin Katti joins OpenAI for infrastructure development
Intel's AI chief Sachin Katti joins OpenAI for infrastructure developmentnextbigwhat.com
This was posted in the Intel Meteor, Arrow, Lunar & Panther Lakes thread yesterday, but I feel it belongs here:Saw this posted on a other forum today, dunno if it already have been posted.
View attachment 132458
Correct.Could be just those(AVX10.2? and APX) being not there in early enablement patches. Let's just wait a little and see then.
I don't think anyone assumed otherwise. All it needed to disrupt that expectation was likely a single engineer accidentally removing references to AVX10 and suddenly the whole internet is like "Oh noes, Intel is doomed, they neutered Novalake!". If it has AVX10, then it was baked in already some time ago. Nothing was going to change that.AVX-512/APX with NVL nice
Even if the chip was speced to have AVX10 Unforseen circumstances may have prevented them from NVL having it anything can happen in the complex process that is chip design.I don't think anyone assumed otherwise. All it needed to disrupt that expectation was likely a single engineer accidentally removing references to AVX10 and suddenly the whole internet is like "Oh noes, Intel is doomed, they neutered Novalake!". If it has AVX10, then it was baked in already some time ago. Nothing was going to change that.
Obviously they got AVX10 spec out because Intel deems it important to have it as a unified code among all cores. That suddenly being canned is a serious setback. So while it could have been canned, the more down to earth expectation is that the reality is much more mundane.Even if the chip was speced to have AVX10 Unforseen circumstances may have prevented them from NVL having it anything can happen in the complex process that is chip design.
I am glad we are getting it as a baseline.
Yes, probably mundane. Lets look at the start of the whole rumor. It was this commit: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=bb16ab062333ef5db63c989613cb2f1d78143cecSo while it could have been canned, the more down to earth expectation is that the reality is much more mundane.
Then there was this comment in that commit:Initial Nova Lake Support
This patch will add initial support for Nova Lake according to Intel ISE.
+@item novalake
+Intel Nova Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
+SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,
+XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,
+MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU,
+VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, AVXIFMA, AVXVNNIINT8,
+AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4 and PREFETCHI
+instruction set support.
Yea I think it's a side effect of chronically online culture.So, one comment didn't mention AVX10 on an initial support commit and people all jumped on the bandwagon that Nova Lake can't do AVX10. It didn't say final--just initial.
