• We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.

Discussion Intel Nova Lake in H2-2026: Discussion Threads

Page 45 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.
They would have blown out the circuit and area budget for the E cores if they had done that. They're already having a problem with margins as it is. It's one of the reasons that some people were holding out hope for an app-p-core Bartlett lake with 12 cores. They could have re-enabled AVX512 on that platform and Intel loyalists would have an affordable pathway to it again.
 
Yeah,
LightningZ71 said:
They would have blown out the circuit and area budget for the E cores if they had done that. They're already having a problem with margins as it is. It's one of the reasons that some people were holding out hope for an app-p-core Bartlett lake with 12 cores. They could have re-enabled AVX512 on that platform and Intel loyalists would have an affordable pathway to it again.
Click to expand...
no APX support is weird tho
 
I mean the problem is Intel is doing the software for Hardware in advance of launch like always but they forget to ship the hardware.
Than Intel execs will say stuff like we need to make open source contribution that give Intel the edge how about delivering the hardware.
 
Det0x said:
Saw this posted on a other forum today, dunno if it already have been posted.

View attachment 132458
Click to expand...

This reminds me of a rumor suggested 'Intel just didn't have time to implement SMT into LionCove and not a sort of any wise technical choice you guys reading too much into it', while Intel tried to explain how good without SMT is.

Maybe Intel is not going to explain how good without AVX512 or AVX10 is, because AVX512 is still currently poorly supported unlike SMT.


Computerbase reports:
www.computerbase.de

Dokumente bestätigen: Kein AVX10 für Intel Nova Lake, dafür eine neue NPU

Die Annahme, dass Intel die neuen AVX10-Instruktionen bei Nova Lake für den Client-Markt einführen wird, war falsch.
www.computerbase.de www.computerbase.de
Dokumente bestätigen: Kein AVX10 für Intel Nova Lake, dafür eine neue NPU

Specs verified: NO AVX10 for Intel Nova Lake, but you will get a new NPU
Click to expand...
 
Hulk said:
Zen 6 and Nova Lake are looking to have so many cores/threads I'm going to be basing my next purchase decision on which one is better for ST. They'll both crush any MT I do.
Click to expand...
If NVL has APX/AVX 10.2 I would choose it over Zen 6 even if it's like 5% behind in ST.
 
511 said:
It has AVX 10.2/APX
github.com

GitHub - uxlfoundation/oneDNN: oneAPI Deep Neural Network Library (oneDNN)

oneAPI Deep Neural Network Library (oneDNN). Contribute to uxlfoundation/oneDNN development by creating an account on GitHub.
github.com github.com
View attachment 132543
Click to expand...

I don't see anything about APX. As far as I know, AVX10 does not imply APX. AVX10 makes sense as they don't need to go full 512 bit so I was surprised when it looked like it might not have had it. Both will need software to be re-compiled to make use of them, right?
 
Thunder 57 said:
I don't see anything about APX. As far as I know, AVX10 does not imply APX. AVX10 makes sense as they don't need to go full 512 bit so I was surprised when it looked like it might not have had it. Both will need software to be re-compiled to make use of them, right?
Click to expand...
My understanding is that now AVX10 specification requires support for 512-bit. Of course that doesn't mean they have to go with full 512-bit datapaths, but at least 512-bit registers and associated support.
 
Nothingness said:
My understanding is that now AVX10 specification requires support for 512-bit. Of course that doesn't mean they have to go with full 512-bit datapaths, but at least 512-bit registers and associated support.
Click to expand...
Latest AVX 10 Spec only supports 512bit vectors
 
How about this: Novalake was supposed to have AVX10.2/APX but since Intel started new initiative with AMD to unify these in order to avoid fragmentation then AMD faced situation that IF they agree to 100% of initial release as per Intel spec (which changed anyway recently), then they'd be at commercial disadvantage as Intel will release first, so there is big incentive for AMD to add their own vision to those which would necessitate Intel avoiding releasing those effectively "beta" versions.

Either that or economy cores simply will be too fat with AVX512 stuff.
 
You must log in or register to reply here.

TRENDING THREADS

Back
Top