Discussion Intel Nova Lake in H2-2026: Discussion Threads

[Fjodor2001]

Nova Lake will be using NPU6 generation according to Linux kernel patch:

Intel Nova Lake To Feature 6th Gen NPU - Phoronix

www.phoronix.com

So not reusing NPU5 from Panther Lake.

 

[511]

NEW IP

 

[Det0x]

Saw this posted on a other forum today, dunno if it already have been posted.

 

[poke01]

Saw this posted on a other forum today, dunno if it already have been posted.

View attachment 132458

It’s like Intel wants AMD to win………………..

 

[poke01]

Seriously, nova lake would have been a slam dunk but nooooooooo gotta make it worse somehow

 

[LightningZ71]

They would have blown out the circuit and area budget for the E cores if they had done that. They're already having a problem with margins as it is. It's one of the reasons that some people were holding out hope for an app-p-core Bartlett lake with 12 cores. They could have re-enabled AVX512 on that platform and Intel loyalists would have an affordable pathway to it again.

 

[poke01]

Yeah,

They would have blown out the circuit and area budget for the E cores if they had done that. They're already having a problem with margins as it is. It's one of the reasons that some people were holding out hope for an app-p-core Bartlett lake with 12 cores. They could have re-enabled AVX512 on that platform and Intel loyalists would have an affordable pathway to it again.

no APX support is weird tho

 

[511]

I mean the problem is Intel is doing the software for Hardware in advance of launch like always but they forget to ship the hardware.
Than Intel execs will say stuff like we need to make open source contribution that give Intel the edge how about delivering the hardware.

 

[regen1]

Could be just those(AVX10.2? and APX) being not there in early enablement patches. Let's just wait a little and see then.

 

[vanplayer]

Saw this posted on a other forum today, dunno if it already have been posted.

View attachment 132458

This reminds me of a rumor suggested 'Intel just didn't have time to implement SMT into LionCove and not a sort of any wise technical choice you guys reading too much into it', while Intel tried to explain how good without SMT is.

Maybe Intel is not going to explain how good without AVX512 or AVX10 is, because AVX512 is still currently poorly supported unlike SMT.


Computerbase reports:

Dokumente bestätigen: Kein AVX10 für Intel Nova Lake, dafür eine neue NPU

Die Annahme, dass Intel die neuen AVX10-Instruktionen bei Nova Lake für den Client-Markt einführen wird, war falsch.

www.computerbase.de

Dokumente bestätigen: Kein AVX10 für Intel Nova Lake, dafür eine neue NPU

Specs verified: NO AVX10 for Intel Nova Lake, but you will get a new NPU

 

[Hulk]

Zen 6 and Nova Lake are looking to have so many cores/threads I'm going to be basing my next purchase decision on which one is better for ST. They'll both crush any MT I do.

 

[511]

We are finally online

 

[511]

Zen 6 and Nova Lake are looking to have so many cores/threads I'm going to be basing my next purchase decision on which one is better for ST. They'll both crush any MT I do.

If NVL has APX/AVX 10.2 I would choose it over Zen 6 even if it's like 5% behind in ST.

 

[511]

It has AVX 10.2/APX

GitHub - uxlfoundation/oneDNN: oneAPI Deep Neural Network Library (oneDNN)

oneAPI Deep Neural Network Library (oneDNN). Contribute to uxlfoundation/oneDNN development by creating an account on GitHub.

github.com

 

[poke01]

It has AVX 10.2/APX

GitHub - uxlfoundation/oneDNN: oneAPI Deep Neural Network Library (oneDNN)

oneAPI Deep Neural Network Library (oneDNN). Contribute to uxlfoundation/oneDNN development by creating an account on GitHub.

github.com

View attachment 132543

Yeah I saw that. Hopefully they enable it in future patches

 

[DavidC1]

They would have blown out the circuit and area budget for the E cores if they had done that.

If they support full 512, but it's manageable with double pumping with 256-bits like with Zen 4, and Skymont with AVX2.

 

[Thunder 57]

It has AVX 10.2/APX

GitHub - uxlfoundation/oneDNN: oneAPI Deep Neural Network Library (oneDNN)

oneAPI Deep Neural Network Library (oneDNN). Contribute to uxlfoundation/oneDNN development by creating an account on GitHub.

github.com

View attachment 132543

I don't see anything about APX. As far as I know, AVX10 does not imply APX. AVX10 makes sense as they don't need to go full 512 bit so I was surprised when it looked like it might not have had it. Both will need software to be re-compiled to make use of them, right?

 

[Nothingness]

I don't see anything about APX. As far as I know, AVX10 does not imply APX. AVX10 makes sense as they don't need to go full 512 bit so I was surprised when it looked like it might not have had it. Both will need software to be re-compiled to make use of them, right?

My understanding is that now AVX10 specification requires support for 512-bit. Of course that doesn't mean they have to go with full 512-bit datapaths, but at least 512-bit registers and associated support.

 

[511]

My understanding is that now AVX10 specification requires support for 512-bit. Of course that doesn't mean they have to go with full 512-bit datapaths, but at least 512-bit registers and associated support.

Latest AVX 10 Spec only supports 512bit vectors

 

[MS_AT]

Latest AVX 10 Spec only supports 512bit vectors

No, it mandates 512b registers have to be supported. You can still use 128b and 256b registers as otherwise it would have been regression from avx512. It is however fair game how you want to implement it in silicon.

 

[Win2012R2]

How about this: Novalake was supposed to have AVX10.2/APX but since Intel started new initiative with AMD to unify these in order to avoid fragmentation then AMD faced situation that IF they agree to 100% of initial release as per Intel spec (which changed anyway recently), then they'd be at commercial disadvantage as Intel will release first, so there is big incentive for AMD to add their own vision to those which would necessitate Intel avoiding releasing those effectively "beta" versions.

Either that or economy cores simply will be too fat with AVX512 stuff.

 

[adroc_thurston]

How about this: Novalake was supposed to have AVX10.2/APX

It still has them.
APX might be an erratafest at least.

 

[poke01]

erratafest

?

 

[Win2012R2]

It still has them.

Including e-cores?

 

[adroc_thurston]

?

Bugs. Silicon bugs.
If they chickenbit'd APX, it might be buggy on the current stepping. But it still has it.

Including e-cores?

Well uh Robinson is driving the entire core roadmap now so you can like, guess it yourself.
Also it's not like you can do hetero ISA without compiler (and virt) people turning you into a human sacrifice in 0.000063 seconds.