Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

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Tigerick

Senior member
Apr 1, 2022
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Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

Intel Alder Lake - NIntel Wildcat LakeIntel Lunar LakeMediatek D9500
Launch DateQ1-2023Q2-2026 ?Q3-2024Q3-2025
ModelIntel N300?Core Ultra 7 268VDimensity 9500 5G
Dies2221
NodeIntel 7 + ?Intel 18-A + TSMC N6TSMC N3B + N6TSMC N3P
CPU8 E-cores2 P-core + 4 LP E-cores4 P-core + 4 LP E-coresC1 1+3+4
Threads8688
Max Clock3.8 GHz?5 GHz
L3 Cache6 MB?12 MB
TDP7 WFanless ?17 WFanless
Memory64-bit LPDDR5-480064-bit LPDDR5-6800 ?128-bit LPDDR5X-853364-bit LPDDR5X-10667
Size16 GB?32 GB24 GB ?
Bandwidth~ 55 GB/s136 GB/s85.6 GB/s
GPUUHD GraphicsArc 140VG1 Ultra
EU / Xe32 EU2 Xe8 Xe12
Max Clock1.25 GHz2 GHz
NPUNA18 TOPS48 TOPS100 TOPS ?






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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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Joe NYC

Diamond Member
Jun 26, 2021
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which AMD product has a 64 core chiplet with L3 in the base die again?

Is that what it is? 64 P-Cores per chiplet, on 18A?
To compete with AMD 32 Dense cores per chiplet on N2.

Intel will have to have a number of extra cores on the die or the yields will be in the toilet.

Are there any estimates for the die size of the 64-P Core chiplet of Diamond Rapids?
 

DrMrLordX

Lifer
Apr 27, 2000
22,902
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18A CWF Darkmont is about 25% more cores in given area than N3E Turin D Z5C when excluding LLC.
Good enough. Seems it all comes down to clocks.

Sorry if I'm late to the party on this one but uh, Intel will be lucky if they get many opportunities to square off against Turin dense with this product. Venice is the real competitor.

PS: imagine if Intel had a tile strategy on the consumer side that would allow them to plant one of these 55mm2 Darkmont tiles in a desktop product. Too much sense? /s

A consumer successor to Alder Lake-N that isn't some weird 2-8c edge computing SKU would be nice. And maybe there is one buried somewhere in Intel's bizarre product portfolio but I can't be arsed to keep track of it. Meanwhile @511 and I think others(?) are finding reports of Panther Lake miniPC/SBC-like boards which potentially make the entire point moot since having a mobile SoC in a consumer product might actually be better anyway.
 

511

Diamond Member
Jul 12, 2024
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Sorry if I'm late to the party on this one but uh, Intel will be lucky if they get many opportunities to square off against Turin dense with this product. Venice is the real competitor.
and they have RRF to compete against Venice likely H1 27
A consumer successor to Alder Lake-N that isn't some weird 2-8c edge computing SKU would be nice. And maybe there is one buried somewhere in Intel's bizarre product portfolio but I can't be arsed to keep track of it
WCL is the only successor for ADL-N afaik
 

DrMrLordX

Lifer
Apr 27, 2000
22,902
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and they have RRF to compete against Venice likely H1 27

That's very optimistic.

WCL is the only successor for ADL-N afaik

There's an edge computing product that shows up on some slides in another thread, it's 2-8c Atom cores but I'm not sure if it's Skymont, Darkmont, or something else entirely. It's not the same as Twin Lake which is just more Crestmont.
 

511

Diamond Member
Jul 12, 2024
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There's an edge computing product that shows up on some slides in another thread, it's 2-8c Atom cores but I'm not sure if it's Skymont, Darkmont, or something else entirely. It's not the same as Twin Lake which is just more Crestmont.
Twin Lake is ADL-N+

That's very optimistic.
maybe H2 2027 it's not fixed tbh but what is fixed is more cores than Clear Water Forest and if i had to guess it's going to be 96*4=384 considering DMR is 64*4 = 256C
 

OneEng2

Senior member
Sep 19, 2022
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there's no way Zen 6C gets 20-25% higher IPC than Zen 5 desktop. If we're talking 16-32MB full 8 x Zen 6 core config then the figure makes sense.
No, probably not IPC. It may very well exceed 25% in each core's performance including clock speed increases though.

How much though ~2mm2?
Does it matter? It appears that CWF Darkmont cores will be about the same size on 18A and a Zen 6C core is on N2 and that on a per core basis, in multi-threaded applications, Zen 6c will likely hold ~ 40% advantage per core in performance.
PTL won't have this L3 Issues cause there are only 6 Ring Stops for the Cores and 1 For IMC I guess.
I am hoping that PTL shows a greatly improved latency over ARL. That would definitely be a game changer for the product.
Jumping over 3 hops, 2 of which are EMIB, just to access L3. Madness...
Agree.
Sorry if I'm late to the party on this one but uh, Intel will be lucky if they get many opportunities to square off against Turin dense with this product. Venice is the real competitor.
Both CWF and Venice D are looking like 2026 products. I am guessing that CWF will be introduced much earlier than Intel can make good volumes on it though. On the flip side, I expect that TSMC's N2 will be punching out a ton of Venice D dies in H2 2026.

I think that Turin D will be the main competition for CWF for the lions share of CWF's life.
 
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gdansk

Diamond Member
Feb 8, 2011
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nonsense.
N2 almost certainly have limited wafers in 2026, so we see it as "Apple only".
Venice is 2027 product.

On similarly way, even if Diamond has ZERO bug, it is 2027 product.
AMD says 2026. Now we know how that usually goes, small quantities. But it likely applies as much to one company's "2026H1" as another company's "2026H2".
SANTA CLARA, Calif., April 14, 2025 (GLOBE NEWSWIRE) -- AMD (NASDAQ: AMD) today announced its next-generation AMD EPYC™ processor, codenamed “Venice,” is the first HPC product in the industry to be taped out and brought up on the TSMC advanced 2nm (N2) process technology. This highlights the strength of AMD and TSMC semiconductor manufacturing partnership to co-optimize new design architectures with leading-edge process technology. It also marks a major step forward in the execution of the AMD data center CPU roadmap, with “Venice” on track to launch next year.
 

DrMrLordX

Lifer
Apr 27, 2000
22,902
12,971
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Twin Lake is ADL-N+

Oh woops that makes it Gracemont, even worse.

maybe H2 2027

Or maybe never.

I think that Turin D will be the main competition for CWF for the lions share of CWF's life.
Nah I'm thinking closer to ~3 months. Especially considering how long it took Intel to get Sierra Forest to general market availability (which was something like 4 months, if not longer), in terms of realistic availability, it may be shorter than that. A few key clients will get Sierra Forest early (if they want it) and everyone else will have to wait so long that Venice dense will be right there.