Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

		Intel Raptor Lake U	Intel Wildcat Lake 15W?	Intel Lunar Lake		Intel Panther Lake 4+4+4
Launch Date		Q1-2024	Q2-2026	Q3-2024		Q1-2026
Model		Intel 150U	Intel Core 7	Core Ultra 7 268V		Core Ultra 7 365
Dies		2	2	2		3
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		Intel 18-A + Intel 3 + TSMC N6
CPU		2 P-core + 8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		4 P-core + 4 LP E-cores
Threads		12	6	8		8
Max Clock		5.4 GHz	?	5 GHz		4.8 GHz
L3 Cache		12 MB		12 MB		12 MB
TDP		15 - 55 W	15 W ?	17 - 37 W		25 - 55 W
Memory		128-bit LPDDR5-5200	64-bit LPDDR5	128-bit LPDDR5x-8533		128-bit LPDDR5x-7467
Size		96 GB		32 GB		128 GB
Bandwidth				136 GB/s
GPU		Intel Graphics	Intel Graphics	Arc 140V		Intel Graphics
RT		No	No	YES		YES
EU / Xe		96 EU	2 Xe	8 Xe		4 Xe
Max Clock		1.3 GHz	?	2 GHz		2.5 GHz
NPU		GNA 3.0	18 TOPS	48 TOPS		49 TOPS

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[OneEng2]

View attachment 117240

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PTL P core is average. 18A good.

I suspect that Panther and Nova will have only relatively small IPC improvements over current generation .... simply because 18A is not considerably more dense than N3B. Still, if Intel uses the extra 10% transistor budget wisely, and cleans up that God Awful ring bus latency, I would expect between 10-15% IPC over Lunar and Arrow. With Arrow, I am a little concerned about clock speed limitations though due to hot spots associated with BSPDN.

 

[511]

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PTL P core is average. 18A good.

Sigh....
No E core testing 🥲.It's A0 they are at b0 stepping.

 

[511]

https://twitter.com/x/status/1890974437337428301

So 18A is a bit more dense vs N3B nice all the people saying 18A is not good should be in shambles

 

[coercitiv]

all the people saying 18A is not good should be in shambles

By now only masochists should be bullish on Intel nodes, since they win either way.

 

[511]

By now only masochists should be bullish on Intel nodes, since they win either way.

Intel TD is fine now days it's the design that needs to get their act together

 

[jdubs03]

By now only masochists should be bullish on Intel nodes, since they win either way.

They have to prove that they can do it. And if they do? Then are you going to give them some credit? Based on publicly available information, 18A will be competitive if not ahead in shipping products.

 

[Markfw]

https://twitter.com/x/status/1890974437337428301

So 18A is a bit more dense vs N3B nice all the people saying 18A is not good should be in shambles

I am not disputing anything, but where does it say this on that post ? I do not see it here .

 

[511]

I am not disputing anything, but where does it say this on that post ? I do not see it here .

It indirectly implies it and the post before that as well.
N3B is denser than N3E also Cougar Cove is a tick of Lion Cove so a core is smaller on 18A than N3B implies 18A is a bit denser than N3B so the area is good Power Performance characteristics will be known by reviews.

Also SPIE/ISSCC this month has update with TSMC N2/18A and High NA.

 

[Kepler_L2]

Also SPIE/ISSCC this month has update with TSMC N2/18A High NA.

Neither are High NA

 

[511]

Neither are High NA

Yes but they are giving update at SPIE regarding HighNa there is also Zen5 deep dive as well.

Looks like I didn't write that correctly my bad

 

[igor_kavinski]

PTL P core is average.

Another point scored by adroc

 

[igor_kavinski]

I know probably discussed here before but Panther Lake with Cougar Cove and Nova Lake with Panther Cove, it would've made more sense to call the former Cougar Lake and the latter Panther Lake and use Nova for some future design. Like how do a bunch of people with above average IQ end up agreeing on these things???

 

[Magio]

I know probably discussed here before but Panther Lake with Cougar Cove and Nova Lake with Panther Cove, it would've made more sense to call the former Cougar Lake and the latter Panther Lake and use Nova for some future design. Like how do a bunch of people with above average IQ end up agreeing on these things???

The most likely thing IMO is Panther Cove was initially meant to be ready for PTL, but missed some development targets and was pushed to NVL. I expect they didn't bother changing the development codename but will change the consumer facing one.

 

[DavidC1]

Sigh....
No E core testing 🥲.It's A0 they are at b0 stepping.

It doesn't really matter. The P cores are supposed to get greater gain than the E. I know it's not saying a lot, because E's are supposed to be 3-5% and P's are 7-10%(or 6-8%) or something.

Still, if Intel uses the extra 10% transistor budget wisely, and cleans up that God Awful ring bus latency,

What happens when there's no real innovation or ideas since Sandy Bridge, the very generation that introduced the Ring Bus.

 

[igor_kavinski]

E's are supposed to be 3-5% and P's are 7-10%(or 6-8%) or something.

2025 is going to be another MEH year for x86 CPUs

 

[DavidC1]

2025 is going to be another MEH year for x86 CPUs

For decades Intel has protected themselves through artificial barriers called the x86 license and lawyers. And because for a time they were financially successful and were a darling of the semi world, it was the first choice for chip talent to go work for.

Here's a problem with artificial barriers. It breeds contentment and laziness, because those inside the bubble believe they are invulnerable.

Instead, the world came to realize they didn't need to penetrate the barrier, rather circumvent it with a totally new category, and that's what Apple did with the revolutionary iPhone.

The technical reasons that people argued for decades about x86 vs ARM and which ISA is superior doesn't matter. The perception seems to matter as much, if not more. It seems with Intel's recent faltering we may see the winner of the 4 decade-long ISA battle emerge. And I don't need to say what that is.

 

[poke01]

This is what loosing design leadership looks like. On desktop Intel just throws more power at the problem, problem with laptops is that you cannot without looking silly.

Oh and that is Cinebench R23, not CB 2024 and the 285H still loses to the M4 Pro.

Also MSI is a horrible laptop maker

 

[511]

If we are comparing with M3 Pro than everything looses in x86 department including AMD

 

[adroc_thurston]

If we are comparing with M3 Pro than everything looses in x86 department including AMD

AMD ships no N3e design outside of Turin Dense.

 

[poke01]

If we are comparing with M3 Pro than everything looses in x86 department including AMD

AMD can compete with HX395+ against the M4 Pro.

Intel has nothing there.

 

[511]

Both of you are right but in 2026 AMD/Apple will be using N2 for their design we would have a iso node comparison by than.
We don't have big APU on Intel side until NVL with Xe3P and I hope they don't cancel it.

 

[Geddagod]

The most likely thing IMO is Panther Cove was initially meant to be ready for PTL, but missed some development targets and was pushed to NVL. I expect they didn't bother changing the development codename but will change the consumer facing one.

I swear there was an interview with an architect of GLC a couple years ago where they made some claim that in the next couple years there were gonna be some large consecutive IPC uplift archs from Intel, wonder whatever happened to that.

It doesn't really matter. The P cores are supposed to get greater gain than the E. I know it's not saying a lot, because E's are supposed to be 3-5% and P's are 7-10%(or 6-8%) or something.

I highly doubt the P-cores get that large of an uplift. I don't even think the P-cores will get a greater gain than the E-cores. At best I think uncore changes might net decent IPC gains in some applications, but other than that....

 

[igor_kavinski]

I swear there was an interview with an architect of GLC a couple years ago where they made some claim that in the next couple years there were gonna be some large consecutive IPC uplift archs from Intel, wonder whatever happened to that.

Raptor Lake degradation happened and he probably thought that no way Intel would abandon monolithic architectures but they did and now he's just scribbling at his desk every day, like a madman, improving his unreleased designs.

 

[511]

I swear there was an interview with an architect of GLC a couple years ago where they made some claim that in the next couple years there were gonna be some large consecutive IPC uplift archs from Intel, wonder whatever happened to that.

I highly doubt the P-cores get that large of an uplift. I don't even think the P-cores will get a greater gain than the E-cores. At best I think uncore changes might net decent IPC gains in some applications, but other than that....

Some instructions in LNC have increased latency so they should address that as well with cougar cove plus few changes to the branch prediction and uncore should make for 5-8% IPC Increase which is fine

 

[Geddagod]

Some instructions in LNC have increased latency so they should address that as well with cougar cove plus few changes to the branch prediction and uncore should make for 5-8% IPC Increase which is fine

Intel has not had a "tick" core uplift that large since like, when? Idk. I find it super hard to believe