Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

		Intel Raptor Lake U	Intel Wildcat Lake 15W?	Intel Lunar Lake		Intel Panther Lake 4+0+4
Launch Date		Q1-2024	Q2-2026	Q3-2024		Q1-2026
Model		Intel 150U	Intel Core 7	Core Ultra 7 268V		Core Ultra 7 365
Dies		2	2	2		3
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		Intel 18-A + Intel 3 + TSMC N6
CPU		2 P-core + 8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		4 P-core + 4 LP E-cores
Threads		12	6	8		8
Max Clock		5.4 GHz	?	5 GHz		4.8 GHz
L3 Cache		12 MB		12 MB		12 MB
TDP		15 - 55 W	15 W ?	17 - 37 W		25 - 55 W
Memory		128-bit LPDDR5-5200	64-bit LPDDR5	128-bit LPDDR5x-8533		128-bit LPDDR5x-7467
Size		96 GB		32 GB		128 GB
Bandwidth				136 GB/s
GPU		Intel Graphics	Intel Graphics	Arc 140V		Intel Graphics
RT		No	No	YES		YES
EU / Xe		96 EU	2 Xe	8 Xe		4 Xe
Max Clock		1.3 GHz	?	2 GHz		2.5 GHz
NPU		GNA 3.0	18 TOPS	48 TOPS		49 TOPS

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[Goop_reformed]

I meant properly. We've had cases when reviewers thought some security features were disabled but were in fact still active. What we think about security and the recommended settings is another issue.

Have a feeling this is just gonna be stability, not performance issues

 

[MS_AT]

We have reports that disabling VBS improves memory latency, people expect we'll see big swings in performance from one review to another, based on wheter security features are (properly) disabled or left enabled to emulate the casual user experience.

By reports do you mean people have confirmed in the past that VBS makes the mem latency worse, or do you mean this one guy who got Arrow Lake ahead of release?

 

[Joe NYC]

Hmmm. Last time I checked, tiles are chiplets. Also, I thought Zen 6 was using silicon bridges, not an interposer?

According to some rumors, it will more likely use the same fanout packaging as Navi31 / 32. Which may also be used in Strix Halo.

We will see if Strix Halo achieves some improvement in latency vs. desktop Zen 5. Except, using LPDDR5, which has higher latency, is going to make it more difficult to get apples to apples comparison.

But, the fanout packaging should have similar latency as Foveros in Arrow Lake.

 

[511]

Zen 6 is N3P though by TSMC Timeline and 18A is for Nova Lake DMR with Coyote/Panther Cove

 

[SiliconFly]

.

 

[coercitiv]

By reports do you mean people have confirmed in the past that VBS makes the mem latency worse, or do you mean this one guy who got Arrow Lake ahead of release?

I meant the one guy, obviously nothing is certain until we get the first wave of reviews out, and it's not worth investigating if the report is real when more trustworthy data is just around the corner.

 

[511]

Nova Lake is 18A-P

It's just 5% PPW vs 18A with Mobile Optimization

 

[cebri1]

It's just 5% PPW vs 18A with Mobile Optimization

It’s 10%

 

[SiliconFly]

.

 

[Hulk]

As for review quality, I would much prefer quality of quantity.
For example, instead of 35 benchmarks that include no specifications as to how they were performed and operating parameters, provide 10 or 12 fully documented benches showing at least average power during the benchmark run and average frequency during the run. Other details like Vcore would be nice as well. Also please include all important bios settings used for testing.

Unfortunately we generally only get those types of benches when WE perform them and report back here.

 

[cebri1]

As for review quality, I would much prefer quality of quantity.
For example, instead of 35 benchmarks that include no specifications as to how they were performed and operating parameters, provide 10 or 12 fully documented benches showing at least average power during the benchmark run and average frequency during the run. Other details like Vcore would be nice as well. Also please include all important bios settings used for testing.

Unfortunately we generally only get those types of benches when WE perform them and report back here.

Phoronix is the one to look for.

 

[igor_kavinski]

Remind me again, please? What was the final concenus regarding Lunar Lake? Total fail? Amazing? Good battery life/ST performance, not so good MT performance? Where Intel's performance/efficiency claims substantiated by reviews?

I just want to know where we are before we dive into ARL.

My takeaway from reading the reviews is that it's way more preferable to MTL-H. Can't wait to see 258V laptops at least get to the $500 mark (they usually do for certain brands like Lenovo and sometimes even HP). But right now, they seem to be priced $150 more than Ryzen AI laptops which are themselves overpriced to begin with.

 

[Hitman928]

Not entirely. Tiles are not like AMD chiplets. Conversely, AMD chiplets can't be called Tiles either.

Tiles are an advanced from of chiplet design compared to older chiplet design AMD uses. AMD chiplets are hardwired on substrate. Intel Tiles sit on interposer that sits on top of substrate.

AMD is expected to switch to Intel's advanced Tile like chiplet configuration with Zen 6.

You could call AMD's approach tiles and Intel's approach chiplets, there's no technical distinction that causes the different naming. AMD was first and called its approach chiplets. Intel followed and didn't want to be seen as copying AMD, so they called their approach tiles, that's it.

 

[Josh128]

As for review quality, I would much prefer quality of quantity.
For example, instead of 35 benchmarks that include no specifications as to how they were performed and operating parameters, provide 10 or 12 fully documented benches showing at least average power during the benchmark run and average frequency during the run. Other details like Vcore would be nice as well. Also please include all important bios settings used for testing.

Unfortunately we generally only get those types of benches when WE perform them and report back here.

Watch out for David Huangs and Chips N Cheese's articles. Those are the most technical reviewers on the net.

 

[cebri1]

Performing well in MT.

 

[dullard]

You could call AMD's approach tiles and Intel's approach chiplets, there's no technical distinction that causes the different naming. AMD was first and called its approach chiplets. Intel followed and didn't want to be seen as copying AMD, so they called their approach tiles, that's it.

Again with this. Intel was first (Pentium D), AMD and the internet called intel's Pentium D chips glued together. Years later AMD comes out with chiplets\tiles and Intel jokes back that they are glued together referring back to AMD's swipe at Intel. Suddenly everyone in all forums says AMD was first with chiplets\tiles. AMD was first with a good implementation. But that doesn't make AMD first.

 

[cebri1]

The game power consumption of Ultra 9 285K is significantly reduced compared with the previous generation. The average power consumption of the 7 games is only 76W, which is less than half of the i9-14900KS, and even lower than the 8-core Ryzen 7 9700X

At least power consumption is now at reasonable levels.

 

[Hitman928]

Again with this. Intel was first (Pentium D), AMD called intel's Pentium D chips glued together. Years later AMD comes out with tiles and Intel jokes back that they are glued together referring back to AMD's swipe at Intel. Suddenly everyone in all forums says AMD was first with tiles. AMD was first with a good implementation. But that doesn't make AMD first.

Pentium D and chiplets are actually technically distinct though. Pentium D put 2 full dies on a package and connected them through FSB. Chiplets actually break up the die into incomplete dies that all work together to give full functionality. It’s not the same thing.

 

[511]

Reviews live ?

 

[gdansk]

Again with this. Intel was first (Pentium D), AMD and the internet called intel's Pentium D chips glued together. Years later AMD comes out with tiles and Intel jokes back that they are glued together referring back to AMD's swipe at Intel. Suddenly everyone in all forums says AMD was first with tiles. AMD was first with a good implementation. But that doesn't make AMD first.

Disagree. Pentium D was a different approach. Two of the same chip, either of which was viable alone. AMD disaggregated cores from SoC hence chiplet as either chip is rather useless by itself. And MTL/ARL are like the AMD approach, not the Pentium D approach.

 

[Hitman928]

Reviews live ?

Whispers are 11 am ET.

 

[Timorous]

Again with this. Intel was first (Pentium D), AMD and the internet called intel's Pentium D chips glued together. Years later AMD comes out with tiles and Intel jokes back that they are glued together referring back to AMD's swipe at Intel. Suddenly everyone in all forums says AMD was first with tiles. AMD was first with a good implementation. But that doesn't make AMD first.

Intel also had the IO die 1st with Clarkdale.

 

[Timorous]

Disagree. Pentium D was a different approach. Two of the same chip, either of which was viable alone. AMD disaggregated cores from SoC hence chiplet as either chip is rather useless by itself. And MTL/ARL are like the AMD approach, not the Pentium D approach.

Pretty sure Pentium D was still using a northbridge and FSB. In fact if I recall correctly for core 1 to speak to core 2 it had to go out to the northbridge over the FSB and back again.

Fundamentally the difference between Pentium D and Zen 2 is that instead of having the northbridge on the motherboard the northbridge is on the CPU package.

You could easily call Pentium D the 1st multi CCD design.

 

[cebri1]

So pretty OK MT results, latency killing latency sensitive apps. We’ll see if with some fine tuning you can get more acceptable results. Pretty impressive gains in performance per watt.

 

[Kepler_L2]

Reviews live ?

功耗比锐龙7还低！Intel酷睿Ultra 9 285K/5 245K首发评测：游戏性能一言难尽

一、前言：Intel首款采用Chiplets设计的桌面处理器或许是i9-14900KS为代表的酷睿第14代处理器的设计失误，让Intel的攻城狮至今心有余悸，代号为Arrow Lake的新一代桌面处理器酷睿Ultra 200S

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