Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

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Tigerick

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Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

Intel Alder Lake - NIntel Wildcat LakeIntel Lunar LakeMediatek D9500
Launch DateQ1-2023Q2-2026 ?Q3-2024Q3-2025
ModelIntel N300?Core Ultra 7 268VDimensity 9500 5G
Dies2221
NodeIntel 7 + ?Intel 18-A + TSMC N6TSMC N3B + N6TSMC N3P
CPU8 E-cores2 P-core + 4 LP E-cores4 P-core + 4 LP E-coresC1 1+3+4
Threads8688
Max Clock3.8 GHz?5 GHz
L3 Cache6 MB?12 MB
TDP7 WFanless ?17 WFanless
Memory64-bit LPDDR5-480064-bit LPDDR5-6800 ?128-bit LPDDR5X-853364-bit LPDDR5X-10667
Size16 GB?32 GB24 GB ?
Bandwidth~ 55 GB/s136 GB/s85.6 GB/s
GPUUHD GraphicsArc 140VG1 Ultra
EU / Xe32 EU2 Xe8 Xe12
Max Clock1.25 GHz2 GHz
NPUNA18 TOPS48 TOPS100 TOPS ?






PPT1.jpg
PPT2.jpg
PPT3.jpg



As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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Jul 13, 2024
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There are different types of "multi-core" performance profiles. One is the useless CB23 stuff - which divides the workload based on total thread count and has each work independently of one another. This type of workload is even more useless when it comes to evaluating laptop performance.

Then there's the GB6 MT way - which this forum despises despite it being the more representative way of how applications work.

So you'll need to clarify what you mean by multicore performance.
 

Gideon

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But you’re also not including that the HX 370 released over 9 months later. It’s main competition through its lifetime will be the M4 Max.
Umm, in both core count and orice Strix Halo will be a much more accurate comparison to MX Max SKUs. It will perform similarily despite using an older node:
I love how they forget that M3 is on TSMC N3b and M4 is on N3e with finflex as compared to Strix Point being on N4p when they do these power/performance comparisons. N3 family is roughly 25-30% better at power/iso perf than N5 family, which N4 is a mild improvement on
Exactly
 
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Doug S

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I’ve been mulling this over a bit. Correct me if off base.

But wouldn’t the best way to measure multicore performance is for example take the CB23/24 nT score in points then divide by clock speed (all-core) then by thread count and then by wattage (or exclude wattage if normalized)? I assume area would be a nice variable in there too but I feel like that’s tougher to get data on. (This would also apply to single core, but we aren’t talking about that right now, this is definitely where Apple is way ahead).

I was thinking about M3 -> M4 and Strix Point, and by using the metric of pts/clock/thread, both actually went down compared to their predecessors.

If the lunar lake is able to maintain similar multicore performance with those less threads that would be a real solid improvement, particularly at iso-power (or even better less power draw).

You would be calculating CB24 MT efficiency per MHz per thread per watt and per sq mm. To what end? Is a CPU that does more CB24 work divided out like that better than one that does less? Why?

What's the point of including both MHz and watts, for example? In the end MHz doesn't matter, why do you care how much work is accomplished per MHz other than some sort of pissing contest over IPC? Watts on the other hand matters quite a lot - at scale (i.e. HPC) it impacts TCO and at the other end of the scale it impacts form factor, as in what level of performance is obtainable in passively cooled devices like phones and tablets. Generally you pay for more MHz by more watts, so if you're already including watts I'd argue including MHz is pointless.

I'd also argue area doesn't matter NEARLY as much as people here seem to want to believe. Can you fit more smaller cores onto a single piece of silicon? Sure, but who cares? The days of servers using monolithic chips are over. If two CPUs can accomplish the same performance and one fits onto a 600 mm^2 monolithic chip and another with fatter cores or bigger caches fits onto four 300 mm^2 chiplets, is the first one better? What if it requires more power to operate, is it still better?

Depending on yields, it might cost the same to produce that 600 mm^2 chip and the four 300 mm^2 chips, but whether that's true or not unless you are Amazon or some other hyperscaler having your own chips fabbed to run your cloud manufacturing cost is irrelevant. For everyone who is buying chips, what matters is its price. And we all know that two chips that cost the same to make can differ in price by 10x, and that's been the case since forever. So what exactly is it you think you'd be proving by including area?

What exactly are you including in area, if you only include core area what's in a "core"? If it shares L2 do you not count it or do you divide it up amount the cores? What about shared units like SME/AMX, do you divide up that area too? Even if it isn't used in CB24 at all? What about L3, what about memory controllers? Those certainly influence MT performance, are you going to ignore that area? What about off chip L3 like AMD's 3D cache, do you count that area? If not, why not? You're counting its power use as part of the "per watt" thing, aren't you? Because if you don't count its power OR its area, you sure as heck can't count its performance and end up with a reasonable result.
 

TwistedAndy

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This isn’t true, Apple still uses much less power in ST despite having 10-wide decoder while delivering much higher IPC than AMD/Intel. The reason why power consumption and clock increased is because of the HP cell for the P cores. The 10watt is for 1 thread and using than more 3 threads drops to 3.94GHz which should halve the power consumption.

Clocks do matter but within reason. As you will see with lunar, Intel won’t achieve same ST as Apple and power consumption for ST will be around 15 watts at 5.1GHz despite having a less wider design( this is what I think. It will have to tested). The all core load clock will be much lower and this is why Lunar scores low in MT compared to M4 in the scores we got so far.

If we compare with AMD, AMD Strix Point (2x4 decoder) around 20 watts at 5.1GHz in CB 2024 ST and scores lower than M3(9-wide decoder) at 4.05GHz which uses 10 watts. We will have to wait and see how M4 compares.

The P-core in Apple M4 consumes 5.6W at 3.87GHz and 9W at 4.46GHz. If we assume that the P-core can achieve 5.1GHz and consume 16W, the power consumption literally tripled for an additional 1.2GHz or 30% higher clocks. If we consider the architecture width, the P-core in M4 consumes 6% more power at the same frequency as the one in M3 while using the newer and more efficient node (N3E vs N3B).

It's not a huge problem for ST loads, but it may create problems for MT loads. If we take M4 Max with 12 P cores and assume that all the P-cores will run at 4.0GHz, the total power consumption will be nearly 80W, which is a pretty high number for a laptop.

Actually, Intel's approach with multiple small cores is a much better choice for MT loads because it's more efficient to scale the performance by adding small cores running on lower frequency than trying to overclock the big cores above the point of maximum efficiency.

That's the reason why AMD uses 8 Zen 5C cores in Strix Point.

Also, what makes you think that a P-core in Intel Lunar Lake will consume 15W on the full load, considering the 17W total power package for the whole SoC and the memory?
 

Henry swagger

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Feb 9, 2022
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True, if more than 3 threads are used the clock drops to full core 3.94GHz from 4.5GHz but thats true of any CPU core under multi-core load. That is WHY high IPC is important it's crucial for mobile and server because you won't run the max clock speed for all core load.

View attachment 104401

Just wait for Lunar vs M3/M4 comparisons later this year. Its more comparible than Xeon or Eypcs. Lunar has no SMT and is a mobile focused design.

There is a reason why Intel is focusing on IPC now because they are very behind and chasing clocks never works. Apple will also need a new desgin soon because they hit a IPC slow down.

Thats a maiframe IBM cpu. Well let me more clear, x86 server CPU. The Xeon/Eypcs will never go above 5.5GHz for multi core.
Apple teaching intel and amd how to design a power efficient high ipc core.. m5 will had another 20% plus
 
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Abwx

Lifer
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At its highest point it reached 59W, but then it’s decreasing as time goes on. The average is thus much lower, around 45W. I suppose if the power draw could be sustained, the score would be a decent bit higher.
The score is for the first run, so that s a score at 58W, following runs yield lower score, you can see the power for each run.

And that s 16 cores, with that amount of cores the 370 would have a 15% higher score at same power, add N3 and that woud provide yet another 8% on top, that is, 24-25% and a score of about 28500 and it would match the M3 Max in CB 2024 as well.
 
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Abwx

Lifer
Apr 2, 2011
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If the lunar lake is able to maintain similar multicore performance with those less threads that would be a real solid improvement, particularly at iso-power (or even better less power draw).

At 8C/8T this CPU is not in the same category, it score 8200 pts at 15W and 10200 pts at 30W, the core amount of the M3 Max and 370 does a big difference in both efficency and total throughput.
 
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Geddagod

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There are many reasons why we won't see Apple M-series CPUs in servers anytime soon.

In the server market, many factors matter much more than performance. These include the software and hardware ecosystem, relationships with OEMs, upgradeability and maintainability, and others.

Even AMD is struggling to increase its market share in the server market despite having pretty good CPUs, not to mention Ampere.

From my perspective, Intel and AMD are fine with the server market. Server SKUs with all Skymont cores are expected to be very interesting.
Not even 10 words in I think I specified "core design".
Clock speeds do matter. In terms of IPC, the P core in Apple M4 is 8-12% faster than M1. Most of the performance improvement comes from higher clock speeds. At the same time, the power consumption of one core has increased more than two times despite being on a much newer node. That's the price Apple pays to have a wider design. The power consumption scales much faster than with simpler Intel and AMD designs.
When comparing two cores against each other, clock speed doesn't matter. I'm so confused why so many people keep on bringing up Apple's stagnating gen on gen IPC uplifts as if that bears any relevance when comparing a core vs another core.
For LNC vs M4, it doesn't matter what the clock speed vs IPC difference is, all that matters is PPA. Generally, higher IPC and lower clocks means better power scaling at the low end, but that's not always true- for example, GLC.
What happens with M5, or M6, or what happened with M3, and M2, bears zero relevance when comparing one core vs another core.
I'd also argue area doesn't matter NEARLY as much as people here seem to want to believe.
Most people put area under performance and perf/watt when comparing architectures, as far as I've seen. No one here is comparing perf/mm2 as the end all be all, except perhaps for the cores (E-cores and dense cores from AMD) that are tailor suited for it.
What exactly are you including in area, if you only include core area what's in a "core"? If it shares L2 do you not count it or do you divide it up amount the cores? What about shared units like SME/AMX, do you divide up that area too? Even if it isn't used in CB24 at all? What about L3, what about memory controllers? Those certainly influence MT performance, are you going to ignore that area? What about off chip L3 like AMD's 3D cache, do you count that area? If not, why not? You're counting its power use as part of the "per watt" thing, aren't you? Because if you don't count its power OR its area, you sure as heck can't count its performance and end up with a reasonable result.
Just because something is hard or complicated doesn't mean we shouldn't even attempt to do it.
A lot of these questions could be answered by attempting to equalize those factors, or adding asterisks next to some of the numbers.
 

poke01

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the P-core in M4 consumes 6% more power at the same frequency as the one in M3 while using the newer and more efficient node (N3E vs N3B).
M4 is using HP cells though vs HD cells on M3. AMD uses HD cells and consumes 20 watts at 5.1GHz on the N4P node. Intel will use HD cells in Lunar Lake with a max clock of 5.1GHz on the N3B node.

Here is the difference tho, an M4 using 16-20 watts at 5.1GHz will still run circles around a Zen 5/lion cove mobile core.



It's not a huge problem for ST loads, but it may create problems for MT loads. If we take M4 Max with 12 P cores and assume that all the P-cores will run at 4.0GHz, the total power consumption will be nearly 80W, which is a pretty high number for a laptop.
80 watts isn’t that high for the class it targets. Strix Halo the 16 core SKU will use even more watts and same with Arrow Lake H/HX.

That's the reason why AMD uses 8 Zen 5C cores in Strix Point.
why do you think Apple uses 6 e-cores for the base M4? M4 Max is a different class and I as said Strix Halo has no Zen 5C cores because it also targets the same performance class.

Also, what makes you think that a P-core in Intel Lunar Lake will consume 15W on the full load, considering the 17W total power package for the whole SoC and the memory?
Why? Because the PL2 of lunar lake is 30 watts. The P-core of Lunar lake when it’s boosted is 5.1GHz and which is why I think the P-core will use around 15 watts to achieve that 5.1GHz clock.

Keep on eye the single core power consumption in Cinebench when the reviews come out.

Someone forgot Intels TDP trickery.
 
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511

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The P-core in Apple M4 consumes 5.6W at 3.87GHz and 9W at 4.46GHz. If we assume that the P-core can achieve 5.1GHz and consume 16W, the power consumption literally tripled for an additional 1.2GHz or 30% higher clocks. If we consider the architecture width, the P-core in M4 consumes 6% more power at the same frequency as the one in M3 while using the newer and more efficient node (N3E vs N3B).

It's not a huge problem for ST loads, but it may create problems for MT loads. If we take M4 Max with 12 P cores and assume that all the P-cores will run at 4.0GHz, the total power consumption will be nearly 80W, which is a pretty high number for a laptop.

Actually, Intel's approach with multiple small cores is a much better choice for MT loads because it's more efficient to scale the performance by adding small cores running on lower frequency than trying to overclock the big cores above the point of maximum efficiency.

That's the reason why AMD uses 8 Zen 5C cores in Strix Point.

Also, what makes you think that a P-core in Intel Lunar Lake will consume 15W on the full load, considering the 17W total power package for the whole SoC and the memory?
I don't think they can sustain 5 Ghz that easily it will require quite a lot of voltage and way too much power like 20W+ easily cause the architecture is already widest and these architecture are designed to be IPC first than Clocks
 
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jdubs03

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You would be calculating CB24 MT efficiency per MHz per thread per watt and per sq mm. To what end? Is a CPU that does more CB24 work divided out like that better than one that does less? Why?…
Well, I suppose as a thought exercise essentially we’re trying to normalize all the factors we can and from that whichever number is higher, would technically be the more efficient/better CPU architecture.

It pretty much is a contest. That’s how I read the back and forth on this.

Say you have two CPUs and they perform at the same level per clock speed, with the same core/thread count, but one consumes less power (disregard area). It would be reasonable to say that the one that consumes less power is technically the better/more efficient, core architecture.

But I see what you mean it can go down the rabbit hole easily, particularly talking about area and cache size, etc.

The score is for the first run, so that s a score at 58W, following runs yield lower score, you can see the power for each run.

And that s 16 cores, with that amount of cores the 370 would have a 15% higher score at same power, add N3 and that woud provide yet another 8% on top, that is, 24-25% and a score of about 28500 and it would match the M3 Max in CB 2024 as well.
How do we know that score is for the first run and not take the longer duration test? They show the timeline of power draw and it references the benchmark, so I don’t see why those are not associated with each other.

You’re saying 4 more cores aren’t going to consume more power? From 12 to 16 will surely bump the score and yes, and for sure N3 will help. But it’s not just free performance gain.
 

Gideon

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You’re saying 4 more cores aren’t going to consume more power? From 12 to 16 will surely bump the score and yes, and for sure
More cores doesn't have to draw any more power. You can simply clock them lower in all core loads and still improve performance (see 5950x vs 5900x for instance)

119126.png


There have also been similar mobile examples, i forgot the exact SKU but remember that adding 33% more cores (from 6 to 8) added 20% MT performance "for free" at about the same power draw
 

TwistedAndy

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When comparing two cores against each other, clock speed doesn't matter. I'm so confused why so many people keep on bringing up Apple's stagnating gen on gen IPC uplifts as if that bears any relevance when comparing a core vs another core.

Ultimately, the only thing that matters is the absolute performance at a certain power consumption. There's nothing wrong with Apple stagnating with gen-on-gen IPC uplifts while the power consumption is under reasonable limits. Apple M3 Max in MBP16 consumes ~70W under CB R23 MT load. It's comparable to some Intel and AMD HX CPUs.

In M4 Max, Apple has to decide whether to use the same TDP and clocks to achieve a 6-8% performance increase or increase the clocks as well and get 80-100W package power with a more noticeable 15% performance boost.

Here is the difference tho, an M4 using 16-20 watts at 5.1GHz will still run circles around a Zen 5/lion cove mobile core.

At 5.1 GHz, it will be ~8-12% faster than 4.45 GHz in apps that scale pretty well with the frequency.

Currently, the P-core in Apple M4 is 14.4% faster than Raptor Cove in mobile 14900HX in Geekbench 5:


1722772791744.png


The comparison is made in Geekbench 5, which does not use any platform-specific optimizations like SME and shows a good correlation with SPEC17. Also, the results for Intel were taken on Linux to avoid the 5-10% Windows penalty in Geekbench.

The Lion Cove core in Arrow Lake will show a similar performance to the Apple M4 P-core.

Why? Because the PL2 of lunar lake is 30 watts. The P-core of Lunar lake when it’s boosted is 5.1GHz and which is why I think the P-core will use around 15 watts to achieve that 5.1GHz clock.

The Intel and AMD CPUs do not use the full PL2 limit for ST loads. For Meteor Lake, the package power is nearly 15W for ST loads.

why do you think Apple uses 6 e-cores for the base M4?

Apple's E-cores are used to lower power consumption under light loads. Those cores are much weaker than Skymont and Zen 5C.
 

Abwx

Lifer
Apr 2, 2011
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How do we know that score is for the first run and not take the longer duration test? They show the timeline of power draw and it references the benchmark, so I don’t see why those are not associated with each other.

We can see power tanking at the end of each run and then peaking again for the next run.

You’re saying 4 more cores aren’t going to consume more power? From 12 to 16 will surely bump the score and yes, and for sure N3 will help. But it’s not just free performance gain.
Basic law of physics, with 33% more core you ll have to dial down frequency by 0.88x to get the same power as with 12C at the reference frequency, so that s actually 0.88 x 1.33 = 1.17x the perf at same power while i said 15%.

Add 8% higher perf thanks to N3 and you re right at 1.17 x 1.08 = 1.26x better perf at same power, so my 24-25% was a slight underestimation.
 

Philste

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Oct 13, 2023
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There have also been similar mobile examples, i forgot the exact SKU but remember that adding 33% more cores (from 6 to 8) added 20% MT performance "for free" at about the same power draw
And that's why I'm disappointed with Strix. Only good looking results is at Phoronix, in rest of the Tests it's about 20% faster than Phoenix at same TDP, despite having 50% more Cores/Threads. 7900X is 32% faster than 7700X at same TDP.
 

maddie

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More cores doesn't have to draw any more power. You can simply clock them lower in all core loads and still improve performance (see 5950x vs 5900x for instance)
Not quite as extreme as it seems, don't forget the binning needed for the various SKUs.
 

jdubs03

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Oct 1, 2013
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We can see power tanking at the end of each run and then peaking again for the next run.

Basic law of physics, with 33% more core you ll have to dial down frequency by 0.88x to get the same power as with 12C at the reference frequency, so that s actually 0.88 x 1.33 = 1.17x the perf at same power while i said 15%.

Add 8% higher perf thanks to N3 and you re right at 1.17 x 1.08 = 1.26x better perf at same power, so my 24-25% was a slight underestimation.
I guess then the benchmark it’s just outputting the highest value from one of the sub-runs? I thought it was throughout the duration, it gives you the average score throughout time, and not the max for instance as if it was just one.

Just curious, where do you get the .88x calculation from?
 

Abwx

Lifer
Apr 2, 2011
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I guess then the benchmark it’s just outputting the highest value from one of the sub-runs? I thought it was throughout the duration, it gives you the average score throughout time, and not the max for instance as if it was just one.

They do several runs to check how much it throttle but use the first run for the score, that s a test of all parameteres after all.

Just curious, where do you get the .88x calculation from?
From the power/frequency scaling of TSMC process, since power scale as a 2.36 exponent of frequency then 1.33x more core require (1.33^1/2.36)x lower frequency to dial down power at the same level as the 12C power.
 
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TwistedAndy

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MTL uses 25+ W for 4.8 GHz ST. For 5.1 GHz, it’s going to be more than 30 W.

Nope. Meteor Lake uses 15-17W (Package Power) under the ST workloads on 4.4GHz. If we decrease the frequency to 3.6GHz, we will get 9.6 to 10W (link).

The results on the newer node are expected to be much better.

1722780529472.png
 
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Abwx

Lifer
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Nope. Meteor Lake uses 15-17W (Package Power) under the ST workloads on 4.4GHz. If we decrease the frequency to 3.6GHz, we will get 9.6 to 10W (link).

The results on the newer node are expected to be much better.

View attachment 104478

Actually Hitman is right, there s curves at Computerbase and in Cinebench ST MTL use 28W for the full package, so that s about 25W for the core.

 

Hitman928

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Nope. Meteor Lake uses 15-17W (Package Power) under the ST workloads on 4.4GHz. If we decrease the frequency to 3.6GHz, we will get 9.6 to 10W (link).

The results on the newer node are expected to be much better.

View attachment 104478

Why are you using the 125H @ 4.4 GHz to claim how much power MTL uses for ST load? MTL, as designed, goes up to 5.1 GHz as the max boost. The 125H itself has a 4.5 GHz boost so that test isn't even using the max boost of the lower tier model. Claiming MTL only uses 20 W for ST boost, and then showing a lower tier model that itself is underclocked is very disingenuous, especially when the conversation was clearly talking about 5.1 GHz operation. MTL will easily user over 30 W to hit 5.1 GHz.

Core%20Ultra%207%20155H%20ST%20POWER%20ANALYSIS.png
 

TwistedAndy

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Why are you using the 125H @ 4.4 GHz to claim how much power MTL uses for ST load? MTL, as designed, goes up to 5.1 GHz as the max boost. The 125H itself has a 4.5 GHz boost so that test isn't even using the max boost of the lower tier model. Claiming MTL only uses 20 W for ST boost, and then showing a lower tier model that itself is underclocked is very disingenuous, especially when the conversation was clearly talking about 5.1 GHz operation. MTL will easily user over 30 W to hit 5.1 GHz.

I use 125H with 4.4GHz because it has a lower PL1 (28W). Even in this case, a single P-core uses nearly half of the PL1 limit. That was the initial point.

Obviously, power limits and the power configuration depend on the OEM and can even be dynamically adjusted by the system.

Returning to Lunar Lake, we don't know how much power it can consume under full ST load. I expect to see something around 10W for 5.0GHz.
 

SpudLobby

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May 18, 2022
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I use 125H with 4.4GHz because it has a lower PL1 (28W). Even in this case, a single P-core uses nearly half of the PL1 limit. That was the initial point.

Obviously, power limits and the power configuration depend on the OEM and can even be dynamically adjusted by the system.

Returning to Lunar Lake, we don't actually know how much power it can consume under full ST load and 5.1GHz clock. I expect to see something around 10W.
Lol at this. I bet 20W.