Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

		Intel Raptor Lake U	Intel Wildcat Lake 15W?	Intel Lunar Lake		Intel Panther Lake 4+0+4
Launch Date		Q1-2024	Q2-2026	Q3-2024		Q1-2026
Model		Intel 150U	Intel Core 7	Core Ultra 7 268V		Core Ultra 7 365
Dies		2	2	2		3
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		Intel 18-A + Intel 3 + TSMC N6
CPU		2 P-core + 8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		4 P-core + 4 LP E-cores
Threads		12	6	8		8
Max Clock		5.4 GHz	?	5 GHz		4.8 GHz
L3 Cache		12 MB		12 MB		12 MB
TDP		15 - 55 W	15 W ?	17 - 37 W		25 - 55 W
Memory		128-bit LPDDR5-5200	64-bit LPDDR5	128-bit LPDDR5x-8533		128-bit LPDDR5x-7467
Size		96 GB		32 GB		128 GB
Bandwidth				136 GB/s
GPU		Intel Graphics	Intel Graphics	Arc 140V		Intel Graphics
RT		No	No	YES		YES
EU / Xe		96 EU	2 Xe	8 Xe		4 Xe
Max Clock		1.3 GHz	?	2 GHz		2.5 GHz
NPU		GNA 3.0	18 TOPS	48 TOPS		49 TOPS

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[adroc_thurston]

Sound too high.

Zen4 is 5.7 on a slower node.
Not really?

 

[SiliconFly]

.

 

[FlameTail]

Zen4 is on one of the best TSMC nodes... N4. Generally speaking, newer nodes like N3B/20A can't be expected to clock as well as N4 during the first iteration.

N5, not N4?

 

[SiliconFly]

.

 

[coercitiv]

N5 is also a very mature node.

FYI Zen 4 is 18 months old already, and it launched with 5.7Ghz boost.

 

[Hulk]

It wouldn’t surprise me if the results end up pretty close to RPL-R while using half the power. I don’t think MT scores are that important past a certain point. It will become important to Reddit once Intel loses the pointless CB R23 supremacy. It's going to be so annoying seeing r/buildapc re-orient themselves and move the goal posts.

For what it's worth, a 14900K isn't actually running at 5.7ghz in CB R23 unless it's pulling well over 300W. I also only see a regression of 15% without HT in CB R23 (I go from 40K to 35K when I disable HT).

You make some good points. The one regarding power is critical and one that many people who do not own a 14900K or 13900K haven't experienced. While a 14900K can boost all the way to 5.6 or 5.7GHz all core it takes a lot of power and a 360 AIO or custom loop to actually achieve.

So in reality I am comparing what a 14900K can theoretically do against what hopefully a "15900K" can do with sane power draw and cooling.

Like you I'm also running my 14900K with HT off. The 16E cores are more than enough to handle any "overflow" from the P's and the additional heat/voltage required for the brief moments HT may be in operation aren't worth it. I've been down that rabbit hole and it ain't fun. Also I don't allow my system to single/dual core turbo, only time it every happens is idle when background tasks are going on and the voltage spikes can't be good for the CPU, yeah I know current would be low but still I don't like my CPU going over 1.3V. I'm set for 5.5/4.4 and 200W. It runs cool and stable. My longwinded point is that 5.5/4.4 is really what ARL needs to compete with because that is the "sane" top end of RPL. Anything higher I consider overclocking.

All that being said, 40,000 is what we're used to seeing for the 14900K so that's what most people will compare ARL against. Though I see people over at the Overclockers forum running their rigs with chillers day-to-day who are achieving 46,000 higher, but those people are a different breed...

At the end of the day I think we're going to be seeing ARL besting RPL by 10 to 15% in ST and losing or perhaps breaking even in rendering or other perfectly multithreaded applications/benches. As you noted, probably at much lower power levels and thermals. Meaning a "better" CPU at the end of the day. Also, since many applications today still only rely on <8 cores I think we're going to see a nice uplift from that 10-15% ST improvement in many applications.

If this is the ARL that we see then it will be very competitive with Zen 5 ST but Zen 5 and it's 16 full size cores should be able to beat ARL in MT rendering.

In conclusion, I agree with you in that I think we're looking at ARL having a nice ST bump, say 12%, and perhaps holding the line in MT with much better power draw/temps/heat.

This is why I had been speculating ARL might be 8+24 as that would take care of any CB concerns Intel marketing might have. I am also wondering if we might be surprised and be seeing a 6+24 Intel part eventually?

 

[SiliconFly]

.

 

[Hulk]

I have been thinking about the rumored removal of HT from ARL and what impact and why it will have on ST performance?

AFAIK HT was originally implemented on the P4 to "reclaim" lost cycles that occur due to pipeline stalls, which could be especially costly with the P4 since the last incarnation I believe had a 31 stage pipeline. Since Raptor Cove currently is a HT CPU that would seem to indicate that pipeline stalls are still an issue and the front end is not being utilized as effectively as it could be, hence the inclusion of HT? Will Intel have to seriously increase the capacity of the front end, in particular the OoO scheduler and other related logic, to saturate the CPU without employing HT?

A HT CPU could be viewed as a hybrid cpu with the P core being the physical core and the E core the logical one. Intel seems to be simplifying things by designing both P and E cores for ST performance, while aiming the P cores toward maximum performance and the E's at maximum performance for a given area.

I know there are many around here with deep understanding of CPU architecture and I'd appreciate hearing (reading) your thoughts on this?

 

[adroc_thurston]

newer nodes like N3B/20A can't be expected to clock as well as N4 during the first iteration.

Yes they are it's foundry stuff.
Please consult TSM yield ramp charts.

Will Intel have to seriously increase the capacity of the front end, in particular the OoO scheduler and other related logic, to saturate the CPU without employing HT?

No they're cutting it off because Apple has no SMT.
It's that simple.

 

[SiliconFly]

.

 

[adroc_thurston]

Totally. It has to be just that only.

Yeah.
Unironically.

 

[jpiniero]

Totally. It has to be just that only.

I was thinking it's either because there's a massive security hole in HT that Intel doesn't want to admit to right now or they are simply cutting costs by not doing the validation.

 

[SiliconFly]

.

 

[adroc_thurston]

I was thinking it's either because there's a massive security hole in HT that Intel doesn't want to admit to right now or they are simply cutting costs by not doing the validation.

It's mostly Apple and a bit of the latter.

Obviously. They just have no other reason.

Yes?
They're making LNL-M a thing specifically because Apple does tablet chips.

 

[SiliconFly]

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[SiliconFly]

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[adroc_thurston]

LNL/PNL are niche

No?
At least Intel doesn't think so.

Not exactly an Apple competitor.

A 4+4 pretty fat iGP SOC with MoP is mainline Mx competition *exactly*.

 

[FlameTail]

A 4+4 pretty fat iGP SOC with MoP is mainline Mx competition *exactly*.

I agree with Adroc on this.

 

[SiliconFly]

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[SiliconFly]

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[FlameTail]

Apple M series silicon are high performance parts. LNL doesn't stand a chance against M series cpu performance. It's more of a niche product designed for low-power ultra mobile market.

Weird. An ARM chip like Snapdragon X Plus would better serve that segment.

 

[adroc_thurston]

Pales in comparison when we compare the performance of the cores

No?

Not exactly an Apple competitior.

It is, literally the entire reason it exist is mainline Mx compete part.

An ARM chip like Snapdragon X Plus would better serve that segment.

ARM is not a requirement and Phoenix-based parts are pretty powerhungry so it won't fit.

 

[FlameTail]

ARM is not a requirement and Phoenix-based parts are pretty powerhungry so it won't fit.

Phoenix, the Oryon core?

 

[adroc_thurston]

Phoenix, the Oryon core?

Yes it's called Phoenix.
The successor is Pegasus.
8cx g4 is a higher power SoC than anything mainline Mx since it just outright has more big cores.
Not direct competitiors really.
Meanwhile, LNL is Mx compete to a tee, 4+4, fat iGP.

 

[FlameTail]

Yes it's called Phoenix.
The successor is Pegasus.
8cx g4 is a higher power SoC than anything mainline Mx since it just outright has more big cores.

Yes, yes. I know about Phoenix and Pegasus. I am the master of the Qualcomm thread.

I was not sure which Phoenix you were referring to, because AMD also has one.