Discussion Intel current and future Lakes & Rapids thread

[Hulk]

Intel 7 - Intel 4 - Intel 3 - Intel 20a and Intel 18a.

Intel 7 was originally 10nm so I assume Intel 4 is 7nm, Intel3 is 5nm..

What Intel 4, 3, 20a, and 18a parts can I buy today?

 

[DrMrLordX]

So you genuinely believe that 18A (a node that has proper backside power delivery and GAAFet) would be analogous to TSMC’s N5?

18a is 18a. Intel has never had another name for it.

Intel 3 was (apparently) going to be their 5nm node before their marketing department started rolling out name changes.

 

[Exist50]

18a is 18a. Intel has never had another name for it.

Intel 3 was (apparently) going to be their 5nm node before their marketing department started rolling out name changes.

Under the old naming scheme, Intel 3 would be 7++, 20A would be 5nm, and 18A would be 5+. But kind of pointless to insist on those names at this point.

 

[Abwx]

Whatever the naming scheme any process that will bring 38% lower power at isofrequency than what is used for RPL will be the equivalent of TSMC s N5/N5P electrical characteristics wise.

 

[A///]

Only when I'm right.

if you think so.

 

[H433x0n]

Whatever the naming scheme any process that will bring 38% lower power at isofrequency than what is used for RPL will be the equivalent of TSMC s 5nm electrical characteristics wise.

That's not how it works. There are design considerations as well as different flavors of an individual node (HP cells, HD cells, etc).

If you were to do a similar power scaling test with the 7900 XTX against the RTX 4080, the 7900 XTX would be 30-40% less efficient perf/watt at sub <250W. They are both powered by the same TSMC N5 node, how would that be possible?

 

[lightisgood]

Surprising if true. Considering that Intel 4 isn't even on the market yet. Unless Intel relaxed their yield and performance targets, of course.

Intel Says All Products Are On or Ahead of Schedule: Arrow Lake Running In Fabs, Client-Segment Recovers

Intel stated during its recent earnings that all products and programs are on or ahead of schedule with Arrow Lake already running in Fabs.

wccftech.com

> with the second-half launch of Meteor Lake, Intel 4, our first EUV node is essentially complete with production ramping.
> For the remaining three nodes, I would highlight Intel 3 met defect density and performance milestones in Q2, we reached PVK 1.1 and is on track for overall yields and performance targets.
[...]
> Building on strong demand of our 13th Gen Intel processor family, Meteor Lake is ramping well and in anticipation of a Q3 PRQ, we will maintain and extend our processor leadership and share gains over the last four quarters.

Whether it is the good news or not, it's a reliable fact refered in earnings report.
You should remember that even Swan confessed the delay of 7nm in 2Q20 earnings.

 

[SiliconFly]

What Intel 4, 3, 20a, and 18a parts can I buy today?

What TSMC N3 & N2 parts can we buy today?

 

[SiliconFly]

Whatever the naming scheme any process that will bring 38% lower power at isofrequency than what is used for RPL will be the equivalent of TSMC s N5/N5P electrical characteristics wise.

And why is that?

 

[clemsyn]

What Intel 4, 3, 20a, and 18a parts can I buy today?

My response was to your question "What are the 5 nodes in 4 years?". The answer to your current question is obvious.

 

[SiliconFly]

My response was to your question "What are the 5 nodes in 4 years?". The answer to your current question is obvious.

@H433x0n answered that already,

 

[Hulk]

My response was to your question "What are the 5 nodes in 4 years?". The answer to your current question is obvious.

Just saying that there is a difference between Intel "intends" to release 5 nodes in 4 years and actually doing it. They have a track record of being quite late at times.

 

[clemsyn]

Just saying that there is a difference between Intel "intends" to release 5 nodes in 4 years and actually doing it. They have a track record of being quite late at times.

Quite late is an understatement if you start with the track record of Brian K. The board messed up big time in choosing him for CEO. Intel is under Pat now, I am really hoping he gets this company in the right track. My one concern is Ann Kelleher who was under BK during the manufacturing mess and is still with them.

 

[Abwx]

That's not how it works. There are design considerations as well as different flavors of an individual node (HP cells, HD cells, etc).

Density is not the most important factor, the primary concern is perf/Watt, that s what make a product competitiveness when it comes to servers and mobile usages, a little less for DT since a médiocre perf/watt still allow for Intel to sell RPL.

If you were to do a similar power scaling test with the 7900 XTX against the RTX 4080, the 7900 XTX would be 30-40% less efficient perf/watt at sub <250W. They are both powered by the same TSMC N5 node, how would that be possible?

What interest us is the comparison with Intel CPUs, 8 ADL P cores set at 241W and using at least 160-180W just match a 65W set 7700X.

8 RPL P cores, wich are fabbed with a much improved Intel 7 process, would still require something like 110-120W to match said 7700X@65W.

 

[dr1337]

On that note, do you think it was appropriate that TSMC labeled their N5 refresh N4 with such a tiny change in performance?

Better to rebrand something you're about to launch instead of a product you're been already making/trying to make for the last 7 years.

 

[Geddagod]

Better to rebrand something you're about to launch instead of a product you're been already making/trying to make for the last 7 years

I get what you are trying to say, but it doesn't hit like you wanted it to hit lol.

What interest us is the comparison with Intel CPUs, 8 ADL P cores set at 241W and using at least 160-180W just match a 65W set 7700X.

8 RPL P cores, wich are fabbed with a much improved Intel 7 process, would still require something like 110-120W to match said 7700X@65W.

Source? Doubt RPL's Intel 7 ultra is that much better than Intel 7 ADL.

What TSMC N3 & N2 parts can we buy today?

What Intel 4, 3, 20a, and 18a parts can I buy today?

Stuff like that is annoying imo. Every time anyone talks about a future product, there is always one person saying "oh but what if it doesn't work" ... well yeah obviously there's that chance, but does that mean we aren't allowed to discuss about future products anymore?

> with the second-half launch of Meteor Lake, Intel 4, our first EUV node is essentially complete with production ramping.

Want to add, Intel specified that MTL will "launch" in Q3 as well.

Performance projections mentioned by leakers are now based on the leaked Intel internal slides. Whether you agree/believe those slides is one thing, but as far as leaks go in this industry, we are now past the point of "mere speculation" for Arrow Lake.

An Intel employee on the Intel subreddit was talking about how the bad performance estimates were bcuz Intel didn't change how they form those performance projections for ARL, and I was thinking, like unless that magically improves ST perf by like another 15% it doesn't matter lol
Very disillusioned about ARL, time to stan Zen 5

Only yesterday, Pat said (and we knew) that they have an actual ARL silicon running in their fab. We still know nothing abt ARL performance actually.

: |

Sapphire rapids already shipped million units.. customers must like the ai accelerators.. sierra forest should perform even bigger in sales

Didn't ICL take the same amount of time since launch to ship a million units as SPR did? (~half a year).
Idk about SRF being even bigger in sales

does anyone know the veracity of pat's claim that arrow is in fab.

Looks at the resident Anandtech Forum Intel leaker

it's almost deceitful if he were stretching the words because of how many individual nodes the ip the processor uses unless i am mixing up my processor families.

IIRC they specified it was Intel 20A, so it had to be the compute tile.
Also doesn't being on A0 sound kinda late?

but if the preliminary leaks about ARL we saw a few days ago are correct, Intel is the one that needs to "pull a rabbit out of the hat".

Eh. It looks like ARL will be slightly more than 'marginally' behind Zen 5. At most like 25% behind in outright peak performance (ST/MT) and power consumption might still be very competitive. But that's just my guess. I don't think this is as bad for Intel as RKL vs Zen 3 was.

Intel can shrink the ARL die to save cost, but I don't think they'll do that.

Looks like an LNC core cluster (Core, L2, L3, ringbus) is around the same size as a RWC one.

I would argue the last good everywhere architect intel did was sandy bridge,

Genuinely agree that RPC, GLC, WLC, SNC were all mid cores. Idk about SKL and cores before that nearly enough to form opinions on them though. PLMC might have been good if it ended up working. RWC looks interesting, might be decent against Zen 4 tbh, even though it's larger, depending on the perf/watt curve you get out of it.

Man like a don't like to bash Intel but some people's cope means they get caught in the cross fire......

That's such a vibe

Just imagine how a massive increase in L2 and L3 can do to IPC. Also, allocating more transistor to logic directly improves IPC. Not just additional cores, but per core IPC increase too due to core optimizations. This can't be done without a redesign when we don't have an increased transistor budget.

I don't think increasing cache capacity has that great of an effect on IPC, if you look at IPC/Perf breakdowns by component of Zen 4 an RPL. X3D stuff is a special cookie though.
Also both Intel and AMD like doing redesigns on an 'old' node, almost certainly to minimize risk. The whole tick tock thing. It's kinda funny then, how if LNC ends up being a bust, it was a redesign on a new node, while GLC and SNC were on 'old' nodes. Though I wonder how design compatible all those 10/7 nm Intel processes were...

Moving to the N3 node for ARL will fix the achilles' heal of Intel 7 which is leakage currents at high frequencies.

Think the achilles heel of Intel is leakage at low frequencies. If you look at perf/watt curves of Intel TGL you see them doing much better at high power versus low power. Also leakage as a whole, I'm pretty sure, takes a larger toll at low frequency, where at high frequency dynamic power loss takes a larger percentage compared to static.

 

[Abwx]

Source? Doubt RPL's Intel 7 ultra is that much better than Intel 7 ADL.

All the numbers are at Computerbase, in the reviews of the 12900K, 7950X and 13900K , that s 3 reviews with perf/power at different power and perfs levels, only the 12900K was tested in a 8 + 0 configuration but we can do some comparisons between the 12900K and the 13700K to see the progress as well as the difference with the 7950X at those same powers and perfs levels.

Edit : RPL process has 0.05V lower voltage at same frequency than ADL one, they eventually also very slightly reduced the voltage margin to boost the perf/watt at average power and loading.

 

[moinmoin]

@Geddagod Who are you quoting? How are you quoting? You know this board has a very useful quote feature where you can select what you want to quote, and have the quote credit and link always included? (Sorry, that last post of you was just annoying to read as the context of the many quotes was no longer easy to follow.)

 

[Geddagod]

@Geddagod Who are you quoting? How are you quoting? You know this board has a very useful quote feature where you can select what you want to quote, and have the quote credit and link always included? (Sorry, that last post of you was just annoying to read as the context of the many quotes was no longer easy to follow.)

Sorry :c

 

[SiliconFly]

if LNC ends up being a bust.

If LNC is a bust, then we'll get ARL refresh.

Or worst case, even a MTL refresh-refresh.

It's not like the +++++ thing shud apply only to the nodes. Why not the cores?

 

[SiliconFly]

Quite late is an understatement if you start with the track record of Brian K. The board messed up big time in choosing him for CEO. Intel is under Pat now, I am really hoping he gets this company in the right track. My one concern is Ann Kelleher who was under BK during the manufacturing mess and is still with them.

I think Kelleher was appointed in the top position by Gelsinger himself and she directly reports to him. Maybe because pat believes in her. Only time can tell.

 

[clemsyn]

I think Kelleher was appointed in the top position by Gelsinger himself and she directly reports to him. Maybe because pat believes in her. Only time can tell.

I think she was the second person under Murphy and when Bob Swan kicked Murphy out she got promoted.

 

[H433x0n]

Eh. It looks like ARL will be slightly more than 'marginally' behind Zen 5. At most like 25% behind in outright peak performance (ST/MT) and power consumption might still be very competitive. But that's just my guess. I don't think this is as bad for Intel as RKL vs Zen 3 was.

The IgorsLab leak isn’t going to be the final performance that we get with ARL next year. I’m not making big performance claims but I can confidently say that’s not the final projections.

The performance targets are milestone specific.

 

[ondma]

The IgorsLab leak isn’t going to be the final performance that we get with ARL next year. I’m not making big performance claims but I can confidently say that’s not the final projections.

The performance targets are milestone specific.

Well, if they mucked up hyperthreading, they almost certainly will be seriously behind in MT. Hopefully single thread might turn out to be somewhat competitive. After a good product with ALD Lake and RPL, very disappointed in RL refresh and probably botched ARL. I was hoping ARL would be a solid product, remaining competitive or ahead in performance and becoming more competitive in power usage.

 

[Exist50]

The IgorsLab leak isn’t going to be the final performance that we get with ARL next year. I’m not making big performance claims but I can confidently say that’s not the final projections.

The performance targets are milestone specific.

What would they be if not final performance projections? It would make little sense to compare an ES to a prior generation. You'd generally want a metric like %target in that case.