Discussion Intel current and future Lakes & Rapids thread

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Abwx

Lifer
Apr 2, 2011
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You're right when it comes to nodes, Intel 18A is set to take the lead in PPA (& PPW) over TSMC in 2025 (both N3 & even the upcoming N2).

But I was just discussing Zen 4 -> Zen 5 vs RPL -> ARL performance increase. Since, Zen 4/5 client cpus are both using older TSMC N4+ nodes, those points doesn't apply here. Thats for Intel vs TSMC discussion.
Is this a TSMC slide ?

1681912883215-png.79725
 

H433x0n

Golden Member
Mar 15, 2023
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Not true. For apples to apples comparison, lets forget MTL for a while.

During 2022 launch: Zen 4 vs RPL:
- Zen 4 had two full-node advantage

During 2024 launch: Zen 5 vs ARL:
- ARL has one full node advantage over Zen 5

It means, Zen 5 is on the same process node like Zen 4 (slightly optimized). And it also means, Intel client has jumped almost 3 full-nodes from RPL to ARL (when compared to TSMC scaling).

In short, ARL is gonna have a massive transistor budget compared to RPL. This directly translates to ginormous performance increase & efficiency. Remember, RPL based on a seriously outdated low-density node is already good enough to compete with Zen 4 based on an advanced high-density node. So, ARL based on a far far superior node with a massive transistor budget compared to RPL, will crush the shit out of Zen 5. It's just math.

Trust me... Zen 5 needs to shift to 3nm to compete effectively.
It's not that simple, you're understating the performance aspect and just looking at raw transistor density.

The Intel 7 node is not 2 nodes behind TSMC N5 in performance, it's behind in density for sure but density is not the sole metric. It's probably close to performance parity with N5, at least the new version of P1274 in RPL-R will be. Performance being classified as clocks at on-current - at volts with leakage taken into account. The jump from Intel 7 -> 20A would probably be ~1.5 nodes of performance improvement. The jump from Intel 7 -> to N3 probably won't net the 2 nodes worth of performance as people believe it will but should in theory reduce overall power usage. Moving to the N3 node for ARL will fix the achilles' heal of Intel 7 which is leakage currents at high frequencies.
 

SiliconFly

Golden Member
Mar 10, 2023
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It's not that simple, you're understating the performance aspect and just looking at raw transistor density.

The Intel 7 node is not 2 nodes behind TSMC N5 in performance, it's behind in density for sure but density is not the sole metric. It's probably close to performance parity with N5, at least the new version of P1274 in RPL-R will be. Performance being classified as clocks at on-current - at volts with leakage taken into account. The jump from Intel 7 -> 20A would probably be ~1.5 nodes of performance improvement. The jump from Intel 7 -> to N3 probably won't net the 2 nodes worth of performance as people believe it will but should in theory reduce overall power usage. Moving to the N3 node for ARL will fix the achilles' heal of Intel 7 which is leakage currents at high frequencies.
Density (and transistor budget) directly matters. Just imagine how a massive increase in L2 and L3 can do to IPC. Also, allocating more transistor to logic directly improves IPC. Not just additional cores, but per core IPC increase too due to core optimizations. This can't be done without a redesign when we don't have an increased transistor budget.
 

itsmydamnation

Diamond Member
Feb 6, 2011
3,073
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What's are you talking about this isn't 130nm to 90nm where everything gets better.

Cache isn't scaling , clocks aren't scaling. Only logic transistor density is. Who's performance core is way smaller then Intel's.....

Man like a don't like to bash Intel but some people's cope means they get caught in the cross fire......
 

SiliconFly

Golden Member
Mar 10, 2023
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What's are you talking about this isn't 130nm to 90nm where everything gets better.

Cache isn't scaling , clocks aren't scaling. Only logic transistor density is. Who's performance core is way smaller then Intel's.....

Man like a don't like to bash Intel but some people's cope means they get caught in the cross fire......
Just out of curiosity, are you assuming that ARL will have the same transistor count as RPL? (cores & caches)
 
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H433x0n

Golden Member
Mar 15, 2023
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Density (and transistor budget) directly matters. Just imagine how a massive increase in L2 and L3 can do to IPC. Also, allocating more transistor to logic directly improves IPC. Not just additional cores, but per core IPC increase too due to core optimizations. This can't be done without a redesign when we don't have an increased transistor budget.
Node performance is arguably the biggest factor for a pure desktop chip. I have no doubt ARL will be a huge jump in perf/watt but I don’t know if it’ll be as big of a jump in raw performance as everybody believes it will be.

Don’t get me wrong, I exclusively use Intel CPUs and will be thrilled if ARL brings a massive performance increase. My personal projection is that we'd be fortunate to see a jump in performance similar to Comet Lake -> Alder Lake.
 
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SiliconFly

Golden Member
Mar 10, 2023
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Node performance is arguably the biggest factor for a pure desktop chip. I have no doubt ARL will be a huge jump in perf/watt but I don’t know if it’ll be as big of a jump in raw performance as everybody believes it will be.

Don’t get me wrong, I exclusively use Intel CPUs and will be thrilled if ARL brings a massive performance increase. My personal projection is that we'd be fortunate to see a jump in performance similar to Comet Lake -> Alder Lake.

Totally agree. I just think ARL should easily compete with Zen 5, if not slightly better (excluding X3D variants).

PPW increase per Intel node shrink:
Intel 7 ===> 20% ===> Intel 4 ===> 18% ===> Intel 3 ===> 15% ===> Intel 20A
(Source: Intel)

In short, PPW gain from RPL ===> ARL is a massive 63%

This amount of gain is actually unheard off and is kinda unfair. ARL power efficiency if going to be off the charts!!!
 

Saylick

Diamond Member
Sep 10, 2012
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Totally agree. I just think ARL should easily compete with Zen 5, if not slightly better (excluding X3D variants).

PPW increase per Intel node shrink:
Intel 7 ===> 20% ===> Intel 4 ===> 18% ===> Intel 3 ===> 15% ===> Intel 20A
(Source: Intel)

In short, PPW gain from RPL ===> ARL is a massive 63%

This amount of gain is actually unheard off and is kinda unfair. ARL power efficiency if going to be off the charts!!!
I'm not quite sure the math works that simply. Power reduction at iso-performance is usually reported at the sweet spot of the frequency curve, not the tippy top. For mobile and server products, where the core operates under 4 GHz, you'll see the perf/W improvement much more obviously than in desktops where the core operates at >5 GHz. For that reason, I doubt we'll see Arrowlake match Raptorlake's ST performance at 63% lower power. There's that effect, along with the fact that there's also uncore power which is more of a fixed cost rather than a variable cost wrt to power.
 

Abwx

Lifer
Apr 2, 2011
11,885
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Totally agree. I just think ARL should easily compete with Zen 5, if not slightly better (excluding X3D variants).

PPW increase per Intel node shrink:
Intel 7 ===> 20% ===> Intel 4 ===> 18% ===> Intel 3 ===> 15% ===> Intel 20A
(Source: Intel)

In short, PPW gain from RPL ===> ARL is a massive 63%

This amount of gain is actually unheard off and is kinda unfair. ARL power efficiency if going to be off the charts!!!

May i remind you that it take about 95W for a 7950X to match a 13900K@142W and about 151W to match the 13900K@250W.

On those two perfs levels that s respectively 50% and 65% better perf/watt for the 7950X, so things are not as rosy as you d like them to be, guess that you have no knowledge of the current perf/watt gap wich is almost the 63% you re hyping as an unbeatable achievement.

 
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SiliconFly

Golden Member
Mar 10, 2023
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I'm not quite sure the math works that simply. Power reduction at iso-performance is usually reported at the sweet spot of the frequency curve, not the tippy top. For mobile and server products, where the core operates under 4 GHz, you'll see the perf/W improvement much more obviously than in desktops where the core operates at >5 GHz. For that reason, I doubt we'll see Arrowlake match Raptorlake's ST performance at 63% lower power. There's that effect, along with the fact that there's also uncore power which is more of a fixed cost rather than a variable cost wrt to power.
Agreed. It's at iso-frequency. But it's the best indicator we have.

For example, an ARL cpu running @ 15W, might even beat Apple Silicon running @ 15W. Just saying.
 
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Saylick

Diamond Member
Sep 10, 2012
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Agreed. It's at iso-frequency. But it's the best indicator we have.

For example, an ARL cpu running @ 15W, might even beat Apple Silicon running @ 15W. Just saying.
Not just iso-frequency, but the sweet spot of the frequency curve. I believe TSMC uses a reference ARM core or something like that when they report the perf/W improvements at iso-perf for their nodes. I think their reference frequency is like 3 GHz. I suspect Intel does something similar.

Again, in reference to my previous comment, the uncore power consumption needs to be accounted for as well. It's not as simple as saying Intel gets a 63% reduction in power so what used to work in a 40W power envelope now works at 15W. Core power consumption may reduce by that %, but uncore may not.
 

SiliconFly

Golden Member
Mar 10, 2023
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May i remind you that it take about 95W for a 7950X to match a 13900K@142W and about 151W to match the 13900K@250W.

On those two perfs levels that s respectively 50% and 65% better perf/watt for the 7950X, so things are not as rosy as you d like them to be, guess that you have no knowledge of the current perf/watt gap wich is almost the 63% you re hyping as an unbeatable achievement.

Like saylick mentioned, the calculation ain't that direct.

Even otherwise, if we do it your own way:
"95W for a 7950X to match a 13900K@142W...", a 63% power reduction leaves ARL at just around 52W compared to 7950X @ 95W. Thats close to half the power. It isn't the right way to calculate. But just saying.
 

SiliconFly

Golden Member
Mar 10, 2023
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Not just iso-frequency, but the sweet spot of the frequency curve. I believe TSMC uses a reference ARM core or something like that when they report the perf/W improvements at iso-perf for their nodes. I think their reference frequency is like 3 GHz. I suspect Intel does something similar.

Again, in reference to my previous comment, the uncore power consumption needs to be accounted for as well. It's not as simple as saying Intel gets a 63% reduction in power so what used to work in a 40W power envelope now works at 15W. Core power consumption may reduce by that %, but uncore may not.
Totally agree!
 

itsmydamnation

Diamond Member
Feb 6, 2011
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Just out of curiosity, are you assuming that ARL will have the same transistor count as RPL? (cores & caches)
im not assuming anything and that's irrelevant.
N3E high performance transistors have very poor density improvement and very poor power improvement for poor speed improvement ( relative to history ) .
This isn't a TMSC problem, this is a semi conductor industry problem.
So the way to improve performance is a massive amount more lower performance logic transistors.

Process technology will be very secondary to architectural performance. Its why all the future cores from all vendors are going so wide.
I would argue the last good everywhere architect intel did was sandy bridge, since then they either did pretty nothing upgrades ( haswell ) , DOA ( cannon) or not really great performance improvement for what resources they added , look at GC rob, decode width , execution, etc and then look at relative performance to similar sized cores ( apple ) or smaller cores Zen/Cortex X.

What has saved intel in many places is pushing 20watts into a core and any place they cant do that it looks quite horrible ( server ). So lets see how intel go toe to toe on uarch over the next 2 years , that's what will matter for performance. For the viability of the company its probably the other way around , they need the massive cost sink ( fabs) to perform. if the fabs perform and yield well they can get away with average uarch thanks to market inertia and the overall cost advantage of vertical integration.
 

Abwx

Lifer
Apr 2, 2011
11,885
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Like saylick mentioned, the calculation ain't that direct.

Even otherwise, if we do it your own way:
"95W for a 7950X to match a 13900K@142W...", a 63% power reduction leaves ARL at just around 52W compared to 7950X @ 95W. Thats close to half the power. It isn't the right way to calculate. But just saying.

63% better PPW reduce power by 39%...

142/1.63 = 87W, that would put a shrinked 13900K just a little ahead of a 7950X at those perf levels but just on par at 151W both.

So you re right in your sayings, your "methodology" isnt the right one, at all, to calculate using your very own numbers as basis.
 

SiliconFly

Golden Member
Mar 10, 2023
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im not assuming anything and that's irrelevant.
N3E high performance transistors have very poor density improvement and very poor power improvement for poor speed improvement ( relative to history ) .
This isn't a TMSC problem, this is a semi conductor industry problem.
So the way to improve performance is a massive amount more lower performance logic transistors.

Process technology will be very secondary to architectural performance. Its why all the future cores from all vendors are going so wide.
I would argue the last good everywhere architect intel did was sandy bridge, since then they either did pretty nothing upgrades ( haswell ) , DOA ( cannon) or not really great performance improvement for what resources they added , look at GC rob, decode width , execution, etc and then look at relative performance to similar sized cores ( apple ) or smaller cores Zen/Cortex X.

What has saved intel in many places is pushing 20watts into a core and any place they cant do that it looks quite horrible ( server ). So lets see how intel go toe to toe on uarch over the next 2 years , that's what will matter for performance. For the viability of the company its probably the other way around , they need the massive cost sink ( fabs) to perform. if the fabs perform and yield well they can get away with average uarch thanks to market inertia and the overall cost advantage of vertical integration.
My bad. I think i didn't explain myself clearly.

(I was just comparing Zen 4 -> Zen 5 vs RPL -> ARL. Thats all)

What I was trying to say was, AMD is going from Zen 4 to Zen 5 (say N4 to N4P), and the density increase is non-existent. So, the transistor budget remains the same. The only way to increase IPC is to re-architect with the same amount of transistors (assuming the die size remains the same).

And Intel is going from RPL to ARL (say Intel 7 to 20A), the density increase is from 100 MTr/mm2 to around 300+ MTr/mm2. ARL gets 3X the transistors for the same die area.

Intel can shrink the ARL die to save cost, but I don't think they'll do that. I think the ARL die is gonna get a significantly higher transistor budget compared to RPL, And those excess transistors can easily be used to increase L2/L3 caches in the cpu tile or even increase core logic for more performance.
 

ondma

Diamond Member
Mar 18, 2018
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Intel takes the lead next year. Maybe a slight lead this year itself depending on MTL/RPL+ (perf/ppw/efficiency).

What pat said was, by 2025, they'll be well ahead and AMD will be in their rear-view mirror. And unquestioned leadership blah blah. It's all social media marketing fluff. So, kindly ignore it.

But the fact remains, Intel takes a slight lead this year, a significant lead next year, and if AMD fails to pull a rabbit out of the hat by the end of 2025, they'll be history. Intel's client & node execution is stronger & quicker than anyone predicted.
I too would like to see Intel be competitive or beat AMD in order to keep pressure on both (and prevent the inevitable gloating of the AMD fan club), but if the preliminary leaks about ARL we saw a few days ago are correct, Intel is the one that needs to "pull a rabbit out of the hat".
 
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gdansk

Diamond Member
Feb 8, 2011
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AMD and Intel share a goal: get their cores to where Apple was in 2020 but this time on a high performance process. And with more cores.
Problem is Intel needs to execute on process, design and validate two architectures, and nail the specific implementations of both such that it clocks high. And they have to do this all at the same time.
It seems AMD has the easier job. TSMC already did the process. AMD has to design and validate one architecture and nail two specific implementations (Zen 5 and Zen 5c). And even then the timing is easier. Zen 5c can be planned later, it probably doesn't delay desktop parts.
 
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