Discussion Intel current and future Lakes & Rapids thread

[mikk]

This is what CEO Pat Gelsinger actually said on feb 24th:
“The simple answer is no. No delays. Arrow Lake is on track. The 3nm programs are on track, both with TSMC as well as our internal 3nm programs including Granite Rapids and Sierra Forest.”

Nothing specific about ARL tapeout or Power-on or first stepping or ES. Just said it's on track.

They don't need to publish, but information leaks happen almost always.

This is wrong, you missed the part where he said this. Watch the replay at minute 7.

 

[A///]

Ah, yup. Must have been asleep when I eventually coughed up the answer. Anyway, yeah, that chip is for Ericsson. Must be doing ok, if they're willing to go back to Intel for the next gen.

or its the price. do you recall pat's initial wording and how they had secured a few clients already? everyone assumed some of the big names were going to fab a few thousand wafers slowly over time in a show of support. now that we know one of the clients is ericsson it stands to reason that perhaps intel pulled a samsung in that the node at the mo may not be great or are offering a discount on a conditional amount or both. i only know ericsson is involved with 5g hardware for the major carriers but beyond that they have not been on my radar since i last had a sony ericsson phone about 22 years ago.

 

[A///]

conspiracy theory Intel didn't have a SRF wafer ready so they just grabbed a SPR one and claim they made a mistake

Leave it to the people who last zoomed in on a held up wafer and were able to roughly figure out what it was.

 

[A///]

To me it means it's running on 20A. Even Lunar Lake taped out over half a year ago. They don't publish tape outs for every chip, actually it's very rare.

they don't, in fact under gelsinger they showed an edited clip after they or he announced a chip that had been taped out was turned on that morning. I cannot tell you if Intel has always been like this but they were cagey under bob swan and Brian Krzanich the middle manager swinger banger.

 

[mikk]

they don't, in fact under gelsinger they showed an edited clip after they or he announced a chip that had been taped out was turned on that morning. I cannot tell you if Intel has always been like this but they were cagey under bob swan and Brian Krzanich the middle manager swinger banger.

Do you have a link to this clip?

 

[Exist50]

or its the price. do you recall pat's initial wording and how they had secured a few clients already? everyone assumed some of the big names were going to fab a few thousand wafers slowly over time in a show of support. now that we know one of the clients is ericsson it stands to reason that perhaps intel pulled a samsung in that the node at the mo may not be great or are offering a discount on a conditional amount or both. i only know ericsson is involved with 5g hardware for the major carriers but beyond that they have not been on my radar since i last had a sony ericsson phone about 22 years ago.

I mentioned before, but this should be considered a win for Intel's networking division, not IFS. And Ericcson would not return for next gen if Intel was completely flubbing the current one.

 

[SiliconFly]

Just went thru the transcript of the earnings call. And it's awesome!

Pat said: "Arrow Lake is currently running its first stepping in the fab". So, naturally, taped-out & powered-on. It's exciting. And they're perfectly on track as promised. Wow! If 20A doesn't have any Fmax clock regression (I believe it won't) and the yields are good enough, there's no stopping Arrow Lake. 2024's gonna be awesome with ARL & Zen 5! Both are 3nm/2nm class CPUs!

I'm not much interested in server side products, but pat said even Sierra Forest has achieved power-on. A little late in the cycle considering they need a lot of time to iterate thru all the errata submitted by customers. But considering the E cores are already mature, they may still make it on time.

 

[eek2121]

Just went thru the transcript of the earnings call. And it's awesome!

Pat said: "Arrow Lake is currently running its first stepping in the fab". So, naturally, taped-out & powered-on. It's exciting. And they're perfectly on track as promised. Wow! If 20A doesn't has any Fmax clock regression (I believe it won't) and the yields are good enough, there's no stopping Arrow Lake. 2024's gonna be awesome with ARL & Zen 5! Both are 3nm/2nm class CPUs!

I'm not much interested in server side products, but pat said even Sierra Forest has achieved power-on. A little late in the cycle considering they need a lot of time to iterate thru all the errata submitted by customers. But considering the E cores are already mature, they may still make it on time.

Actually, unless plans have changed, Zen 5 is rumored to be on 4nm. Zen 5c is rumored to be on a variant of N3. This means Intel will have a process advantage for the first time in a while. Hopefully they don’t squander it.

 

[A///]

Do you have a link to this clip?

I got it off leonard's twitter back then, this is an old clip and it may have been for another processor class. when you get old you lose the ability to remember key details. not that the wine helps much.

 

[A///]

I mentioned before, but this should be considered a win for Intel's networking division, not IFS. And Ericcson would not return for next gen if Intel was completely flubbing the current one.

this is true, it is a tiny win for ifs. and is ericsson coming back next gen? you expect me to know these things as if I've not got better things to do, like research vintages.

 

[trivik12]

Sor Arrow Lake is on 20A. Unfortunately not question was asked for mobile vs desktop.

 

[SiliconFly]

Actually, unless plans have changed, Zen 5 is rumored to be on 4nm. Zen 5c is rumored to be on a variant of N3. This means Intel will have a process advantage for the first time in a while. Hopefully they don’t squander it.

Oh my god! Zen 5 has no 3nm!?! Thats very sad. I'm gonna hope that ain't true.

Hope people remember that Raptor Lake beat the hell out of Zen 4 during launch. And it took Zen 4 3D VCache variants for AMD to reclaim the gaming performance crown. The sad fact is, Zen 4 is a TSMC N4 (5nm+) product & Raptor Lake is a Intel 7 (10nm+) product. In simple words, Zen 4 had two full-node advantage & still lagged behind Raptor Lake in many aspects.

Intel P-cores are fat but very performant. Now, if Zen 5 is gonna be stuck in the same old TSMC N4 & ARL is gonna be on 20A, it'll be a total disaster for AMD. I'm hoping Zen 5 has a 3nm variant to level the playing field. If AMD gets crushed so soon, it's not going to be good for any of us.

Remember, only after Lisa Su happened, the idiots at Intel fired all the paper pushing morons & idiotic bean-counter CEOs & brought in Pat, a true engineer. And only after he came, we now have 5 nodes in 4 years, dis-aggregation, BPD, GAA, 20A/18A, a new uArch very soon, etc. None of this would have happened if not for Lisa Su. Lets pray AMD doesn't get crushed too fast too soon.

Competition is mandatory. And IMHO:

For good Intel products, a successful AMD is mandatory.

 

[DrMrLordX]

Oh my god! Zen 5 has no 3nm!?! Thats very sad. I'm gonna hope that ain't true.

Why? N4P is already an excellent process, so good that N3B isn't really seen as a desirable upgrade from it except maybe in density. And AMD has been very good about working with TSMC to customize the node to their liking. They should be fine.

 

[SiliconFly]

Why? N4P is already an excellent process, so good that N3B isn't really seen as a desirable upgrade from it except maybe in density. And AMD has been very good about working with TSMC to customize the node to their liking. They should be fine.

Not true. For apples to apples comparison, lets forget MTL for a while.

During 2022 launch: Zen 4 vs RPL:
- Zen 4 had two full-node advantage

During 2024 launch: Zen 5 vs ARL:
- ARL has one full node advantage over Zen 5

It means, Zen 5 is on the same process node like Zen 4 (slightly optimized). And it also means, Intel client has jumped almost 3 full-nodes from RPL to ARL (when compared to TSMC scaling).

In short, ARL is gonna have a massive transistor budget compared to RPL. This directly translates to ginormous performance increase & efficiency. Remember, RPL based on a seriously outdated low-density node is already good enough to compete with Zen 4 based on an advanced high-density node. So, ARL based on a far far superior node with a massive transistor budget compared to RPL, will crush the life out of Zen 5. It's just math.

Trust me... Zen 5 needs to shift to 3nm to compete effectively.

 

[SiliconFly]

Sor Arrow Lake is on 20A. Unfortunately not question was asked for mobile vs desktop.

Sadly no. ARL desktop version will exist depending on the health of 20A (esp. Fmax, yield & capacity). Desktop cpus require decent boost clocks / turbo frequency to effectively compete with competition. And the capacity & yield of 20A is not known too at the moment. We can only guess.

Actually Intel 4 is a lean node purpose-built specifically for just one damn MTL tile (one generation only). So, if Intel can do such a good job with Intel 4, I think they can do a equally good job with 20A, if not better. So, I expect to see desktop parts too along with mobile SKUs next year. Maybe with a few months delay to tweak the boost clocks.

ARL @ 5.5GHz+ will slaughter Zen 5.

 

[Abwx]

Sadly no. ARL desktop version will exist depending on the health of 20A (esp. Fmax, yield & capacity). Desktop cpus require decent boost clocks / turbo frequency to effectively compete with competition. And the capacity & yield of 20A is not known too at the moment. We can only guess.

Actually Intel 4 is a lean node purpose-built specifically for just one damn MTL tile (one generation only). So, if Intel can do such a good job with Intel 4, I think they can do a equally good job with 20A, if not better. So, I expect to see desktop parts too along with mobile SKUs next year. Maybe with a few months delay to tweak the boost clocks.

ARL @ 5.5GHz+ will slaughter Zen 5.

Intel said that their process is supposed to have better perf and perf/watt than the competition, read TSMC, somewhere in 2025, so anything released before say mid 2025 at the earliest is not supposed to be so...

 

[Exist50]

this is true, it is a tiny win for ifs. and is ericsson coming back next gen? you expect me to know these things as if I've not got better things to do, like research vintages.

Current gen = Intel 4 chip I showed.

Next gen = Intel 18A chip recently accounced.

Neither being IFS wins. The majority of the design work will be done by Intel's team (Gene Scuteri, iirc).

Though more accurately, these contracts are for a whole platform, not just one chip.

 

[DrMrLordX]

It means, Zen 5 is on the same process node like Zen 4 (slightly optimized). And it also means, Intel client has jumped almost 3 full-nodes from RPL to ARL (when compared to TSMC scaling).

And the problem with this is what exactly? Zen3 was on the same node as Zen2. That didn't exactly hurt AMD either. Intel isn't going to gain much from a node advantage, if anything.

 

[SiliconFly]

Intel said that their process is supposed to have better perf and perf/watt than the competition, read TSMC, somewhere in 2025, so anything released before say mid 2025 at the earliest is not supposed to be so...

Intel takes the lead next year. Maybe a slight lead this year itself depending on MTL/RPL+ (perf/ppw/efficiency).

What pat said was, by 2025, they'll be well ahead and AMD will be in their rear-view mirror. And unquestioned leadership blah blah. It's all social media marketing fluff. So, kindly ignore it.

But the fact remains, Intel takes a slight lead this year, a significant lead next year, and if AMD fails to pull a rabbit out of the hat by the end of 2025, they'll be history. Intel's client & node execution is stronger & quicker than anyone predicted.

 

[H433x0n]

ARL @ 5.5GHz+ will slaughter Zen 5.

I'm not confident it will clock that high though. Personally, I would consider anything over 5.2ghz a win.

There's certainly some missing context in the IgorsLab data about ARL performance. It will perform better than what his charts showed since as far as I know (unless this changed recently) the performance projections at Intel are done per each milestone. That being said - according to the internet Zen 5 is supposed to be a massive performance boost. If Zen 5 ends up performing according to what is rumored, Zen 5 will have a larger uplift over Zen 4 than ARL has over RPL-R.

My point is, I wouldn't be too confident either way.

 

[SiliconFly]

And the problem with this is what exactly? Zen3 was on the same node as Zen2. That didn't exactly hurt AMD either. Intel isn't going to gain much from a node advantage, if anything.

That is what i just mentioned. A multi node jump offers a significant boost in transistor budget (and hence performance). ARL will end up with massive L2/L3 caches & extreme boost clock optimizations in cpu logic due to all the extra transistors offered by the massive increase in transistor budget.

For node specs, refer to anandtech articles on node density (MTr/mm2). Increase in density directly and positively impacts performance. And the main reason all silicon companies tend to jump nodes again and again. To sum it up:

Higer density -> More transistors -> More caches + more optimized logic -> More performance (& efficiency)

Thats why AMD was easily beating Intel in both performance & efficiency without breaking a sweat. They had a massive node advantage when Intel was stuck in 14++++++++++ & 10++++++++++ nodes. Now Intel is all set to get a massive advantage over AMD. Very massive.

In foundry parlance, ARL is going to get a 3 full-node jump over RPL which is pretty much unheard of in the industry. A massive increase in transistor density & count (budget). ARL has the potential to totally kill Zen 5. AMD is all set for slaughter if they're not going to make 3nm client products. Trust me, it's a very sad situation.

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[adroc_thurston]

Is this a bepo sockpuppet account?

 

[Abwx]

In foundry parlance, ARL is going to get a 3 full-node jump over RPL which is pretty much unheard of in the industry. A massive increase in transistor density & count (budget). ARL has the potential to totally kill Zen 5. AMD is all set for slaughter if they're not going to make 3nm client products. Trust me, it's a very sad situation.

As said Intel said that they wont have leadership perf/watt and perf for their process till 2025, that was stated in the last report, as for Zen 5 it will use both 4nm and 3nm, depending of the segment, that s in their published roadmap, you should look at the first post of the Zen 5 thread.

Discussion - Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

Speculate at will

forums.anandtech.com

 

[SiliconFly]

I'm not confident it will clock that high though. Personally, I would consider anything over 5.2ghz a win.

There's certainly some missing context in the IgorsLab data about ARL performance. It will perform better than what his charts showed since as far as I know (unless this changed recently) the performance projections at Intel are done per each milestone. That being said - according to the internet Zen 5 is supposed to be a massive performance boost. If Zen 5 ends up performing according to what is rumored, Zen 5 will have a larger uplift over Zen 4 than ARL has over RPL-R.

My point is, I wouldn't be too confident either way.

(Note: Consider Zen 4 & RPL as baseline for apples-to-apples comparison)

Understood. Zen 5 is going to get a huge IPC uplift due to a new architecture.

But ARL is also going to get a decent IPC uplift due to significant architectural upgrades. But IPC uplift comes from other areas too. Like larger caches for example. Considering the humongous transistor budget ARL is getting from a massive node jump, IPC uplift due to cache increase itself will be significant. And when combined with architectural IPC uplift, ARL will comfortably blow away Zen 5 without much sweat. Even without massive boost clocks. And along with these, if ARL hits 5.5GHz boost, consider Zen 5 dead. It's that simple!

 

[SiliconFly]

As said Intel said that they wont have leadership perf/watt and perf for their process till 2025, that was stated in the last report, as for Zen 5 it will use both 4nm and 3nm, depending of the segment, that s in their published roadmap, you should look at the first post of the Zen 5 thread.

Discussion - Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

Speculate at will

forums.anandtech.com

You're right when it comes to nodes, Intel 18A is set to take the lead in PPA (& PPW) over TSMC in 2025 (both N3 & even the upcoming N2).

But I was just discussing Zen 4 -> Zen 5 vs RPL -> ARL performance increase. Since, Zen 4/5 client cpus are both using older TSMC N4+ nodes, those points doesn't apply here. Thats for Intel vs TSMC discussion.