Discussion Intel current and future Lakes & Rapids thread

[nicalandia]

Look What I found guys.
Xeon Silver 4400 (Sapphire Rapids-SP / Intel 7 / LGA4766 / 8ch DDR5)
　 4416+ 20-core / 40-thread 2.10-3.00GHz TDP165W
　 4410T 12-core / 24-thread 2.10-3.00GHz TDP145W
　 4410T 10-core / 20-thread 2.90-3.10GHz TDP150W

The strange 10 Core 20 Thread Sapphire Rapids makes it's debut in Sisoftware in 2S form..

Silver 4410T (10C 20T 2.7GHz/4GHz, 10x 2MB L2, 26.25MB L3)

Details for Result ID 2x Intel(R) Xeon(R) Silver 4410T (10C 20T 2.7GHz/4GHz, 10x 2MB L2, 26.25MB L3)

ranker.sisoftware.co.uk

View attachment 68394

Not sure if you Guys saw this....

Those 10C/20T CPUs(on 2S System) are 100% Monolithic in nature You can't divide 10 cores on 4 tiles. Likely they have built a smaller Monolithic die for smaller core size Sapphire Rapids


Also. Credit to YuuKi_AnS for leaking the entire line, he was Spot On(at first I did not believe that Intel was actually going to release a Monolithic 10C/20T SPR-SP, but he proved me wrong)

 

[moinmoin]

Gracemont Cores were design for Die Area/Performance efficiency, specially on Integer Performance. They are efficient cores but that is not their main design goal.

Sure, that's still a more commendable goal* than the high frequency pursuit Intel's desktop chips had for half a decade now and even trickled down to mobile chips. Due to the lack of a separate power plane Gracemont cores had to follow suit with Golden Cove cores in the ADL chip so far. In this chip they'll finally stand alone.

(* and a design goal Intel's server chips should take a look at after the SPR monstrosities.)

 

[NostaSeronx]

True but we don't know what the Gracemonts power ranges will be. Only that presumably the N305 is the higher power one.

8-core N300 = 7W TDP && 8-core N305 = 15W TDP
PL2/PL4 for 15W = 35W && 83W
PL2/PL4 for 6W/7W = 25W && 78W

We do know the power range.

 

[igor_kavinski]

8-core N300 = 7W TDP && 8-core N305 = 15W TDP
PL2/PL4 for 15W = 35W && 83W
PL2/PL4 for 6W/7W = 25W && 78W

We do know the power range.

Source?

 

[NostaSeronx]

Source?

Alder Lake-N のコア数と TDP (PL1), PL2 | Coelacanth's Dream

Intel の Vidya Gopalakrishnan 氏より、Coreboot に Alder Lake-N SKU の TDP, Power Limit の設定値を追加するパッチが投稿、公開されている。 パッチでは Alder Lake-N の各設定値以外に、コア数に関する記述も見られる。 soc/intel/alderlake:

www.coelacanth-dream.com

Specifically:

https://review.coreboot.org/c/coreboot/+/64472/1/src/soc/intel/alderlake/chip.h#33

https://review.coreboot.org/c/coreboot/+/63369/6/src/soc/intel/alderlake/vr_config.c#62

https://review.coreboot.org/c/coreboot/+/64472/1/src/soc/intel/alderlake/chipset.cb#67

 

[poke01]

8-core N300 = 7W TDP && 8-core N305 = 15W TDP
PL2/PL4 for 15W = 35W && 83W
PL2/PL4 for 6W/7W = 25W && 78W

We do know the power range.

If Intel calls these low power it's sad. It only has 8 e-cores and yet when it turbos for a short time it uses 25 watts what?? This is embarrassing.

Intel CPUs without turbo boost at the low level are not good. This tutbo boosting is not at all great for mobile and fanless laptops.

If it's a low power chip it should not use more than 10 watts. I know you can set the limits but then this already worse CPU will become junk as it relies on these short boosts to pick up pref but this effects battery life.

Intel still can't be do ultra mobile or mobile.

 

[Exist50]

If Intel calls these low power it's sad. It only has 8 e-cores and yet when it turbos for a short time it uses 25 watts what?? This is embarrassing.

Intel CPUs without turbo boost at the low level are not good. This tutbo boosting is not at all great for mobile and fanless laptops.

If it's a low power chip it should not use more than 10 watts. I know you can set the limits but then this already worse CPU will become junk as it relies on these short boosts to pick up pref but this effects battery life.

Intel still can't be do ultra mobile or mobile.

This is a chip for the low cost market. It's competing against 4x Zen2 (Skylake-class IPC) with 8x GRT (also Skylake-class IPC). Should be more than competitive in that role.

 

[NostaSeronx]

If Intel calls these low power it's sad. It only has 8 e-cores and yet when it turbos for a short time it uses 25 watts what?? This is embarrassing.

Intel CPUs without turbo boost at the low level are not good. This tutbo boosting is not at all great for mobile and fanless laptops.

If it's a low power chip it should not use more than 10 watts. I know you can set the limits but then this already worse CPU will become junk as it relies on these short boosts to pick up pref but this effects battery life.

Intel still can't be do ultra mobile or mobile.

It probably isn't going to be the worst...

Pentium N6000 boosted up to ~20W only for 15 seconds across most devices.

FT5 Pollock (behavior also applies to FT6 Mendocino);
6W is base TDP (FT6: 8W-15W)
12W is slow PPT, FT5/(FT6) can be at this for 30 minutes if SoC stays below 85C+. (FT6:16W-30W)
18W is fast PPT, FT5/(FT6) can be at this for 5 minutes if SoC stays below 75C+. (FT6:24W-45W)

Intel's basic behavior for 7W will probably follow N6000 and be at 25W for 15 seconds. The only cases where it won't follow basic behavior is with:
- Performance Mode(PL2=PL1 mode) in BIOS toggled on, which is sometimes in actively cooled laptops/minipc variants.

 

[Harry_Wild]

Intel got to bring their fabrication down to the 4nm in order to be competitive in the industry.

 

[jpiniero]

This is a chip for the low cost market. It's competing against 4x Zen2 (Skylake-class IPC) with 8x GRT (also Skylake-class IPC). Should be more than competitive in that role.

This market is so price sensitive that it's going to entirely depend on how much Intel asks for it. 14 nm Atoms are the real competition.

 

[semiman]

Why put them on the photoresist? That just leads to more etching and more chemical waste.

Because photoresists can be applied only in a 'whole wafer' manner. As for incomplete edge chips, that's really up to manufacturers. There can be uniformity issues during etching and deposition processes if there are no adjacent logics.

 

[DrMrLordX]

If Intel calls these low power it's sad. It only has 8 e-cores and yet when it turbos for a short time it uses 25 watts what?? This is embarrassing.

Intel CPUs without turbo boost at the low level are not good. This tutbo boosting is not at all great for mobile and fanless laptops.

If it's a low power chip it should not use more than 10 watts. I know you can set the limits but then this already worse CPU will become junk as it relies on these short boosts to pick up pref but this effects battery life.

Intel still can't be do ultra mobile or mobile.

It's not going to boost to 25W unless it has cooling to match.

 

[eek2121]

If Intel calls these low power it's sad. It only has 8 e-cores and yet when it turbos for a short time it uses 25 watts what?? This is embarrassing.

Intel CPUs without turbo boost at the low level are not good. This tutbo boosting is not at all great for mobile and fanless laptops.

If it's a low power chip it should not use more than 10 watts. I know you can set the limits but then this already worse CPU will become junk as it relies on these short boosts to pick up pref but this effects battery life.

Intel still can't be do ultra mobile or mobile.

I mean, efficiency really isn’t that bad considering it is binned for cost. If Intel would build something like an SBC or a complete build smaller than a NUC, I would buy a few to use as TV boxes.

 

[nicalandia]

What kind of weird ES CPU is this?

Intel 0000 (6C 12T 3GHz, 3x 1.25MB L2, 10MB L3)

Details for Result ID Genuine Intel(R) 0000 (6C 12T 3GHz, 3x 1.25MB L2, 10MB L3)

ranker.sisoftware.co.uk

 

[jpiniero]

What kind of weird ES CPU is this?

Intel 0000 (6C 12T 3GHz, 3x 1.25MB L2, 10MB L3)

Details for Result ID Genuine Intel(R) 0000 (6C 12T 3GHz, 3x 1.25MB L2, 10MB L3)

ranker.sisoftware.co.uk

Says it's virtualized.

 

[uzzi38]

The funny part is, those are Zen 3 numbers. If Intel had opted not to create a hybrid CPU, but rather, had focused on efficiency, they would have had their own '5950x'. It would have been slightly worse thanks to a slightly worse process, lack of chiplets, and a garbage interconnect, but they could have sold people like me one thanks to sane power consumption.

I do happen to know for a fact Intel 7 does not cost Intel anywhere close to $9,000/wafer. Note that my number includes everything, including R&D. Intel's number for Intel 7 is close to half of your number, FWIW. I can't disclose much, but if you think I am wrong, just look at the 'margins' section of the earnings report. You, as an end user can easily calculate the number of dies per wafer, and therefore guess as to whether what I say is accurate. A typical split on a manufactured product is 33% manufacturer, 33% distributor, and 33% retailer FYI. Take from that what you may.

EDIT: I did want to add one thing here. I don't expect you to believe the above statement because I am a random internet person, but TSMC N7 originally launched at around 10 grand a wafer. Look at TSMC's margins and do the math from there if you don't. If you doubt the 10 grand number, just do some Googling. Intel's costs are lower than TSMC's, and total margin required is significantly less.

Good night.

I want you to think long and hard about what you're suggesting here:

Intel 7 is so price/perf competitive with N7 it costs Intel half as much to produce these fully processed wafers that they're... not a part of IFS 2.0.

 

[jpiniero]

Intel 7 is so price/perf competitive with N7 it costs Intel half as much to produce these fully processed wafers that they're... not a part of IFS 2.0.

That's because the yields are so noncompetitive that nobody outside of Intel would want it to use it. Intel can get away with it with client parts to an extent... but there's a reason Pat admitted that Intel is going to be cashflow negative through 2024.

Whoever pushed Granite Rapids to be redone as Sea of Cores (Keller?) may have literally saved the company.

 

[Exist50]

Whoever pushed Granite Rapids to be redone as Sea of Cores (Keller?) may have literally saved the company.

Why are you assuming that it is? Assuming you mean "sea of cores" as a bunch of small chiplets on a large base die.

 

[jpiniero]

Why are you assuming that it is? Assuming you mean "sea of cores" as a bunch of small chiplets on a large base die.

That's what the rumors are saying. It was originally similar to Sapphire in being 4 chiplets but then changed to be closer to what Milan/Genoa is.

 

[Exist50]

That's what the rumors are saying. It was originally similar to Sapphire in being 4 chiplets but then changed to be closer to what Milan/Genoa is.

Yeah, probably not safe to assume it's like AMD....

 

[uzzi38]

That's because the yields are so noncompetitive that nobody outside of Intel would want it to use it. Intel can get away with it with client parts to an extent... but there's a reason Pat admitted that Intel is going to be cashflow negative through 2024.

Whoever pushed Granite Rapids to be redone as Sea of Cores (Keller?) may have literally saved the company.

Given the fact that Intel are only going larger on monolithic dies (see: SPR MCC) I also don't think the assumption that yields are a problem is a good one.

But that's just a guess.

As far as the facts go: Intel 7 (nor 10ESF for that matter) is not a part of IFS going forwards. It goes without saying but there clearly must be an issue for it to not be used whilst Intel 16 and Intel 4 will be.

 

[nicalandia]

Given the fact that Intel are only going larger on monolithic dies (see: SPR MCC) I also don't think the assumption that yields are a problem is a good one.

On such a big Die Yields are an issue regardless, but since they own their own fabs and cost have been said to be 1/3rd of what it would cost them to do it to TSMC, they just can print more wafers to meet demand.

Monolithic Dies have been confirmed 100%(That 10C/20T Xeon Silver CPUs based on Sapphire Rapids I posted before) and that Huge Die is proof that Intel just don't mind low yields because they can just print more wafers(Silicon is rather inexpensive and they own their own foundry and Intel 7 is very mature)

 

[btarlinian]

Given the fact that Intel are only going larger on monolithic dies (see: SPR MCC) I also don't think the assumption that yields are a problem is a good one.

But that's just a guess.

As far as the facts go: Intel 7 (nor 10ESF for that matter) is not a part of IFS going forwards. It goes without saying but there clearly must be an issue for it to not be used whilst Intel 16 and Intel 4 will be.

Design rules are supposedly quite painful to work with on Intel's 10 nm process due to significant self-aligned multipatterning. This is one of the things they've specifically highlighted as being a benefit from moving to EUV in their Intel 4 papers.

 

[IntelUser2000]

Design rules are supposedly quite painful to work with on Intel's 10 nm process due to significant self-aligned multipatterning. This is one of the things they've specifically highlighted as being a benefit from moving to EUV in their Intel 4 papers.

It may be something like this, and simple as Intel 7 wasn't decided to be the node for IFS.

Remember prior attempts were never serious at becoming a foundry - rather it was an afterthought, something to supplement their revenue stream.

Even if Intel processes were significantly cheaper and faster, and lower power, if you had to port everything to their proprietary libraries, or that they treated you badly, most will simply not use theirs.

 

[hemedans]

According to Computerbase, GC P-core consumes 21W at 4.9Ghz : https://www.computerbase.de/2021-11/intel-core-i9-12900k-i7-12700k-i5-12600k-test/2/
They also found that E-Core under full load consumes between 5 and 6 watts.

So if they opted to create a monolithic 16 P-core part, it would had to be clocked much lower (my guess ~11 to 15%) to keep it under the same 241W limit. 12900K with E cores is about 30% faster than without E cores (see here). Since Ryzens gain between 65 and 75% going from 8 to 16 cores in MT scenarios (average, see here for 7700X/7950X and 5800X/5950X), my guess is that 16 P core part (with ~10% clock regression and 241W limit) would have performed around ~18-21% faster than 12900K (stock) in MT.

Intel actually did good with 13900K, as they claim to get "up to" 41% better MT performance vs 12900K which is around 17-19% better than a hypothetical 16 P core part based on Golden Cove. They will most likely still lose the MT crown but they are going to be much closer to 7950X versus the hypothetical 16 P part.

Could E core be more effcient than X core in Snapdragon 8+ gen 1?