Discussion Intel current and future Lakes & Rapids thread

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moinmoin

Diamond Member
Jun 1, 2017
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I honestly don't expect Intel to turn that patent into reality under whatever name, it's just the audacity of the patent existing at all.
 
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Doug S

Platinum Member
Feb 8, 2020
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I don't think I'd lay the blame on "Intel" the corporation, but whatever engineer(s) filed that patent for Intel. I doubt we will ever hear of it since it would probably get settled before getting a court date and publicity, but I would not be shocked if Intel seeks so sue whoever that is to disgorge any bonuses they were paid as a result of that patent. If they are still an employee they will definitely be fired. Many companies, and I assume Intel is one, give bonuses for engineers who file patents, so I guess if you want that money but you aren't smart enough to come up with something on your own you steal someone else's work.

Not only did whoever filed that patent defraud Intel, they can could also sue for reputational damage (not sure what the proper legal term for that would be in terms of a corporation)
 
Jul 27, 2020
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I don't think I'd lay the blame on "Intel" the corporation, but whatever engineer(s) filed that patent for Intel. I doubt we will ever hear of it since it would probably get settled before getting a court date and publicity, but I would not be shocked if Intel seeks so sue whoever that is to disgorge any bonuses they were paid as a result of that patent. If they are still an employee they will definitely be fired.
How is a huge corporation like Intel letting a lone engineer file a patent? There has to be at least an additional lazy senior engineer behind this fiasco who approved the patent for submission.
 

nicalandia

Diamond Member
Jan 10, 2019
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Is on the News...

It's been a few tough years for Intel PR department...


 

Doug S

Platinum Member
Feb 8, 2020
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The patent has like 16 names on it.

I wonder if that same group of 16 has their name on other (not plagiarized) patents. Maybe a team working together files all their patents as one, regardless of who originates it and does the writeup?

This could get ugly.
 

mikk

Diamond Member
May 15, 2012
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Is on the News...

It's been a few tough years for Intel PR department...



Ocean Cove is expected to power the 14th Gen Meteor Lake/Arrow Lake processors



:laughing:
 
Jul 27, 2020
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But does this really matter? They have a technology cross-licensing agreement. Maybe this one isn't a serious patent at all? Just something to confuse AMD regarding their future roadmap?
 

Accord99

Platinum Member
Jul 2, 2001
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In my experience with patents, the only thing that matters are the claims, which in this case seems to be only related to cache coherency and provides almost no details on the rest of the processor's architecture. Every thing else in a patent is really just fluff.

I guess one way for Intel to avoid accidental leaks about your future architecture is to only use AMD slides in your patent .
 

Exist50

Platinum Member
Aug 18, 2016
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I wouldn't read to much into this, Underfox is a very reputable source when it comes to unearthing patents, but in this particular instance I believe the information to be out of date.

These patents were no doubt authorized, but Ocean Cove has been cancelled by Intel for at least a year now.

Ocean Cove was meant to be the next natural progression of Intel's Microarchitecture, sticking to the iterative engineering formula that they have employed internally for decades now. (Wider, Deeper, Smarter). However a more radical departure from previous designs was suggested instead by Jim Keller et al, and as such Ocean Cove was cancelled and replaced with this new radical design. (Most likely Lunar Lake & Beyond)

Wait, what?!? First of all, Ocean Cove was anything but an incremental design. Probably the most radical change Intel had planned since Itanium. Everything I'm aware of today is less ambitious from a purely architectural level, including Royal and Lion Cove.

Moreover, it was killed around 2017 or so, before Keller joined the company. He would have taken a very different approach to the team if he had been there.

I know *very* little about this new design. But what I do know is that it completely changes the way we think about physical cores, and it is instead based around the idea of abandoning big core designs such as Golden Cove, Redwood Cove, etc, and only having small cores. The "big" cores will be created dynamically as and when needed by stitching together little cores.

So instead of having something like Alder Lake where you have 8 Golden Cove Cores and 8 Gracemont Cores, in the next generation design you would simply have something like 48 ****mont cores. The configuration of these cores is then managed by a process (I'm not sure whether it's Hardware or software based yet)

You could have configs that change on the fly depending on what the user needs:

- 48 mont cores, and 0 cove cores (maximum multi-threading performance)
- 32 mont cores and 8 cove cores (via stitching together 16 mont cores into pairs)
- 16 mont cores and 16 cove cores (via stitching together 32 mont cores into pairs)

In the long term you could even merge the mont cores together into larger groups, and have something along the lines of:

- 32 mont cores and 4 cove cores, and 2 super-wide cove cores (via stitching together 8 mont cores into pairs, and another 8 mont cores into 2 groups of 4)

Essentially, the idea is why constrain yourself to a particular configuration right out of the factory, when you can dynamically resize cores by merging smaller components together as and when needed?

Just imagine merging together 4 Gracemont cores together horizontally into one super-wide core, and then imagine doing that with future more advanced ****mont cores.

THAT is Intel's vision of the future.
Where's all this coming from? Doesn't match anything I'm aware of. And certainly not Lion Cove.
 

dullard

Elite Member
May 21, 2001
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A couple things to note:

1) They reference the AMD slides (heck they reference Anandtech's article of the slides, see the fourth item in "Other References"). So it was known to both Intel and the patent office that the designs directly related to the slides are not patentable by Intel.

2) What matters with patents are the claims. The claims relate to how Figure 39 is used. The claims are a bit past my knowledge of CPU functionality. Can someone here with more knowledge point out if the AMD slides mention every single thing in the claims?

The way patents work is that your patent only covers items that do every single part of the claim. I could for example patent sharks with lasers on their heads wherein the lasers are attached by banana peels. The concept of sharks with lasers on their heads is not novel, it is already well known. The patent would reference the Austin Powers movie in the Other References section. So, I cannot patent sharks with lasers on their heads. But, using banana peels to attach the lasers is novel and is really non-obvious (most evil geniuses would use something sturdier). So, I could patent the combination of all three items: sharks, lasers on their heads, and banana peels to do the attachment.

As a first step to check the claim validity, do the AMD slides mention a snoop controller in an interconnect that determines hits in two caches? There is more to the patent claims, but on a quick search I did not see the snoop controller in AMD's slides.
 
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DrMrLordX

Lifer
Apr 27, 2000
21,620
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But all socket 7 was Intel/AMD compatible, right ? (as I remember it)

They were compatible, but they were not direct copies of an actual design. Pretty sure the 386 and 486 clones were very very close to Intel designs. Actually the 5x86 was kind of a suped up 486 if memory serves, but again, that was just AMD copying the 486. In any case, k5; k6; k6-II; and k6-III were not copies of any Intel design.
 

gdansk

Platinum Member
Feb 8, 2011
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What is stopping Intel from Copying Zen and making it better? Wasn't AMD making Pentium II clones way way back then?
Courts ruled AMD's license from Intel was valid up to the 486, even including microcode.
Nothing like that will happen for Intel.
 
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IntelUser2000

Elite Member
Oct 14, 2003
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One more thing to consider for the SoC.

Intel-1-2.jpg


See bullet 6.

So if you go through the Investor Meeting 2022 presentations and zoom into a Meteorlake picture, you can read the letters for some of the blocks.

CPU and the GPU tile has "D2D" or Die-to-Die connection. They described this D2D before in the talk about modularity and Foveros.

From there you can read:
-Atom Complex
-Security Complex
-Media Complex
-something-PU
-IO Complex
-Display Complex
-unknown block

The specific mentions of Atom indicates to me that it's an older much more power/die efficient core like Silvermont. It's efficient enough to use in phone modems and it's completely x86 compatible as we know.

And the latest iteration goes into the E cores. I cannot read what the letters say on those blocks though.
 

dullard

Elite Member
May 21, 2001
25,055
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So if you go through the Investor Meeting 2022 presentations and zoom into a Meteorlake picture, you can read the letters for some of the blocks.
...
And the latest iteration goes into the E cores. I cannot read what the letters say on those blocks though.
Could you link the presentation that you are referring to? I looked at two closely and neither one had those letters. So, I'm missing what you are referring to.