Is there a reason for BGA devices to have more pins than the LGA variants? 6700K / 1151 and the 6820HK / 1440 etc
Can't be just the PCH. The Y-chips have more balls than U-chips. Something to do with power delivery. Since the mobile chips have to reach really low standby power and even lower C-states, the extra connections might help in doing that.
Did they ever port the SF features for Rocketlake too? The power draw wouldn't be significantly higher, right? Cfv^2 = watts?
Nope. SF features are for 10nm. They could do that for 14nm, but that means investing in a node that's designed to be obsolete soon.
Combination of excessive power use and even die size due to the larger/wider core is why they have only 8 cores. It's supposed to use 200-250W just like the 10900K, despite having 2 less cores.
. . . that might be true, but I see no reason why Intel would even think about Sunny Cove on 10SF (or 10SFE).
They could have Tigerlake-S, but I suspect even on 10nm SF it can't reach the crazy 5.3GHz+ frequencies they are aiming for, since 14nm cores have reached that due to endless refinement. If the best case frequency they can pump out is 5GHz, then the improved uarch will be significantly countered by the loss in frequency.
A 5 vs 5.3GHz its a 6% difference. 5.4GHz is 8%. That's already half of gains due to architecture lost.
The EUs might not be large, but why bother reducing them to a third then?
Shows that Intel cores are somewhat larger with comparable IPC, caches too. Hopefully helps with 5+ GHz clocks, but they have to strive for denser designs. That 7nm has to work or they'll need TSMC for a while/permanently.
You can actually see from the shot that to cut area taken by the Xe iGPU to half, you need to cut 64EUs away. The performance won't go down to a third, since fixed function units and bandwidth stay the same. If equal, the 96EU version is going to be 2-2.5x faster, but desktops aren't thermally limited so we might end up with a figure close to half the performance.
Their Tremont cores are extremely dense. It took 4x Goldmont cores to equal single Skylake. It takes 5x Tremont cores for a single Sunny Cove core. The size of the core in Tremont is only slightly larger than the 512KB L2 cache in Zen 3.
I suspect this is part of the reason they are planning hybrid, as the existence of the two nicely bridges the differences.
The only issue is that servers are left hanging. They might just need a dedicated third core that's based on the Core uarch but focuses on 4GHz frequencies for higher densities.