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Discussion Intel current and future Lakes & Rapids thread

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Exist50

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Aug 18, 2016
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Almost certain I'm taking the bait here, but this is an interesting post regardless.
Don't be fooled. That is 100% BS. Nosta's post history is almost entirely nonsensical technobabble he pulled out of the ether. It may include technical-sounding language in some places (note, merely sounding), but it has zero connection with reality.
 

jpiniero

Diamond Member
Oct 1, 2010
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I think what that note really means that they won't start producing the fixed version until they also start on Rocket-S.

Remember it's like 3+ months from when production starts.
 

Ajay

Diamond Member
Jan 8, 2001
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No. As of Q4'18 (Last time Intel updated this slide) Intel "only" had 3 14nm Fabs online, though I imagine pretty large fabs at that and since then they have expanded the capacity of those fabs.

View attachment 20300
Well, I'm finding it hard to source more recent info, but I thought, for instance, that all four D1 series fabs in Oregon were doing 14nm. One Hillsboro(D1X - though maybe only the recent expansion) fab and one in Chandler(42) are tooling up for 7nm. I haven't read anything besides that. I don't know why it's so hard to find this info - one would expect that info to get out in industry news outlets. The BIG fabs are D1X (Hillsboro), 42 (Chandler), 28 (Kiryat Gat) and 24 (Leixlip).
 

Ajay

Diamond Member
Jan 8, 2001
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If...

And the answer is pretty sure no. They can use 10nm for desktop for another couple years. I'm going to suggest that desktop is now the last class citizen. Mobile and server gets new process first, desktop lags behind. And for mobile it will also only be part of the lineup. Most will go to servers (CPU and accelerators).
You got me, 'when'...
Yeah, I suppose desktop would be last as Intel is supposed to be doing server first. Still, desktop cannot lag very far behind because 10nm just isn't going to have the required volume (barring a miracle).
 

jpiniero

Diamond Member
Oct 1, 2010
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Videocardz has an update saying that Intel is already producing the fixed version of the Foxville controller. So I don't think you can read into Rocket Lake-S's release by that earlier note.
 

DrMrLordX

Lifer
Apr 27, 2000
16,468
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@SAAA

Looks like AES performance is skewing the score in Tiger Lake's favor in ST. In MT, it's AES and Speech recognition. Also, it looks like Kaby had a ~300 MHz clockspeed advantage. So not too bad really.
 
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IntelUser2000

Elite Member
Oct 14, 2003
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Looks like AES performance is skewing the score in Tiger Lake's favor in ST. In MT, it's AES and Speech recognition. Also, it looks like Kaby had a ~300 MHz clockspeed advantage. So not too bad really.
I almost never use the built-in comparison tool because it doesn't break it down into categories. Comparing it individually shows the Single Thread, Integer score, which is what perf/clock really is.

According to that, with 7% advantage in favor of Kabylake, Tigerlake does 3.9% better.

But I'd be wary of making comparisons based on a single result. Only final reviews with the same testing environment is the way to go. You don't know with two different testers what things they are doing differently. That's why user-submitted results such as Geekbench can vary wildly. You can see *identical* setups getting 30% better. It's pretty much you look at the result and say "Oh cool" and no more no less.

@Exist50 I do not think I'm being pessimistic by stating 4.3GHz. The cores are going to have a perf/clock advantage and it'll clock 10% higher. That's a very decent gain. Whiskeylake performs identically to Icelake in ST, which means Tigerlake will be that much faster(perf/clock + clock over ICL).

But this is likely why we have Rocketlake, as the 10nm is nowhere near mature. The cores are completely new, but the process itself is probably characterized in every which way possible.
 

Exist50

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Aug 18, 2016
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@Exist50 I do not think I'm being pessimistic by stating 4.3GHz. The cores are going to have a perf/clock advantage and it'll clock 10% higher. That's a very decent gain. Whiskeylake performs identically to Icelake in ST, which means Tigerlake will be that much faster(perf/clock + clock over ICL).
I suppose this would be a good time to mention the new leak claiming the i7-1185G7 will have a 4.7GHz boost clock.

https://m.weibo.cn/status/4497220525148079

I have no connection to the leaker, but they previously leaked a Comet Lake S document, so there's some measure of credibility.

https://www.tomshardware.com/uk/news/leaked-purported-internal-intel-doc-reveals-core-i9-10900k-performance-up-to-30-percent-gain-in-threaded-tests

In any case, the one thing I don't expect is significant IPC gains. Oh the cache will probably buy them a bit, and maybe there'll be other small changes here and there, but none of the leaks thus far seem to suggest a significant IPC improvement.

The cores are going to have a perf/clock advantage and it'll clock 10% higher. That's a very decent gain. Whiskeylake performs identically to Icelake in ST, which means Tigerlake will be that much faster(perf/clock + clock over ICL).
Isn't that statement kind of sad? For any other company (Apple, ARM, even AMD), a 10% gain a year after a near-zero gain would be called terribly disappointing. We're used to like twice that rate in mobile.

But this is likely why we have Rocketlake, as the 10nm is nowhere near mature. The cores are completely new, but the process itself is probably characterized in every which way possible.
Rocket Lake's existence can be justified regardless of 10nm yields and performance, if for no other reason than it's dirt cheap. I expect Intel to make boatloads of profit by dumping Rocket Lake on the enterprise laptop market, and gamers will probably eat up Rocket Lake S regardless of power consumption. Though by that point AMD's likely to be essentially equal in single thread.
 

coercitiv

Diamond Member
Jan 24, 2014
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Rocket Lake's existence can be justified regardless of 10nm yields and performance, if for no other reason than it's dirt cheap. I expect Intel to make boatloads of profit by dumping Rocket Lake on the enterprise laptop market, and gamers will probably eat up Rocket Lake S regardless of power consumption.
If that were true then where was Skylake on 22nm? Where is Zen2 on 12nm? Such a theory doesn't just need to stand up to immediate scrutiny, but to historic records as well. In the best case scenario, which is little or no competition, you do what Intel did: jump on the next node but keep transistor count relatively constant. This way you control costs with great efficiency while keeping your R&D going. You almost get to keep the cake too.

Meeting demand and/or damage control are more likely candidates than cost optimization.
 

Exist50

Member
Aug 18, 2016
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If that were true then where was Skylake on 22nm? Where is Zen2 on 12nm? Such a theory doesn't just need to stand up to immediate scrutiny, but to historic records as well. In the best case scenario, which is little or no competition, you do what Intel did: jump on the next node but keep transistor count relatively constant. This way you control costs with great efficiency while keeping your R&D going. You almost get to keep the cake too.

Meeting demand and/or damage control are more likely candidates than cost optimization.
Well they clearly developed Rocket Lake in the first place as a backup plan for continued 10nm failures, but with that work mostly done, they might as well use it.
 

mikk

Platinum Member
May 15, 2012
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I suppose this would be a good time to mention the new leak claiming the i7-1185G7 will have a 4.7GHz boost clock.

https://m.weibo.cn/status/4497220525148079

If true my bet for the i7-1165G7 Turbo is 4.5 Ghz. That was my initial expection a few months ago and based on the early ES I think this is realistic. In general Intel is extremely defensive about Tigerlake, they haven't even published their GDC Xe primer which was scheduled for April.
 

uzzi38

Golden Member
Oct 16, 2019
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In general Intel is extremely defensive about Tigerlake, they haven't even published their GDC Xe primer which was scheduled for April.
Expect something soon-ish. Probably in the next month
 
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Ajay

Diamond Member
Jan 8, 2001
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If true my bet for the i7-1165G7 Turbo is 4.5 Ghz. That was my initial expection a few months ago and based on the early ES I think this is realistic. In general Intel is extremely defensive about Tigerlake, they haven't even published their GDC Xe primer which was scheduled for April.
Expect something soon-ish. Probably in the next month
Good lord I hope we get some solid info soon. The rumors are just killing me. There is such a fog over everything 10nm.
 

DrMrLordX

Lifer
Apr 27, 2000
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What a strange forum this is. Half the people swear it's not a backport, and the other half pretends it's a given.
I really can't see that big of a core being thermally feasible on 14nm, let alone as an 'S' product.
If it isn't a backport, then what is it?
 

SAAA

Senior member
May 14, 2014
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What a strange forum this is. Half the people swear it's not a backport, and the other half pretends it's a given.
I really can't see that big of a core being thermally feasible on 14nm, let alone as an 'S' product.
The thermally feasible sounds completely silly to me, like it's surely more feasible than in a denser node temperatures wise: you only get better by spreading components apart. We are long past the point were a smaller node has twice the power efficiency and can be as cool if not lower temp than the previous one, that scaling is truly dead.
Now clocks will be another matter but there I expect the IPC advantage to take back any single thread loss and some more.

OK, maybe it won't be full Willow cores with AVX512 and larger caches but definitely something new, else how do you recoup the 2 less core? Why release 8 core max after 10 core Comet Sky Lake?

If there were rumors of 12 core Rocket Lake I would have no troubles believe it's the same exact arch again, but this time they designed motherboards with PCIe 4.0 in mind and the chip is rumored to have gen12 GPU: there's a 90% chance it's Willow Cove backport, with the 10% being Sunny Cove in my opinion.
 

coercitiv

Diamond Member
Jan 24, 2014
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I think Intel had a problem with die size, not thermals.

rocketlake.SKYLAKE pun intended.
 

naukkis

Senior member
Jun 5, 2002
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The thermally feasible sounds completely silly to me, like it's surely more feasible than in a denser node temperatures wise: you only get better by spreading components apart. We are long past the point were a smaller node has twice the power efficiency and can be as cool if not lower temp than the previous one, that scaling is truly dead.
Signaling speed is limited, so you have to design your core arrays to given size. With more compact manufacturing process you could put more transistors in given space. Like AMD have to cut 7nm Zen2 L1i to half to accommodate more space for increased op cache - they did build their 7nm core to be just as big as they could. They can't manufacture that core in less dense manufacturing process as structures grow too big to fit in signaling covered area.

This have been true for entire silicon manufacturing era, they invent more advanced manufacturing node which makes possible to put more transistors in given space resulting more advanced design being able to operate at same clock speed. Going that route backwards seems absurd to me, something like backwards Moore law. Some people proposing idea of backporting cpu cores to older manufacturing process did get fired from Intel but idea still lives strongly in forums.

Do Intel have said anything about backporting whole cpu cores? What they need to do is to make new 14nm cpu core which could implement their after Skylake-invented IP which could be implemented in 14nm design, whole 10nm cpu core would be way too big for 14nm. Or other way around, if they could implement their 10nm cpu core in 14nm manufacturing process and achieve similar clocks their 10nm design is horribly off from it's target.

But also Intel do have history of trying to build too big cpu cores, IPX432, Tejas, whole IA64 - I actually do get feeling that their whole Cove-series of cores are also too big, they did try to catch more IPC with big design which limited their clock headroom which resulted very inefficient design. Design times are long so they are married to their too big of a cpu core for few years to come, probably they could fix their screw up only with 7nm cpu designs.
 
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coercitiv

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Jan 24, 2014
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Some people proposing idea of backporting cpu cores to older manufacturing process did get fired from Intel but idea still lives strongly in forums.

Do Intel have said anything about backporting whole cpu cores?
They kinda' did.

Untitled-1.jpg

The interesting element to these slides is the mention of back porting. This is the ability for a chip to be designed with one process node in mind, but perhaps due to delays, can be remade on an older ‘++’ version of a process node in the same timeframe. Despite Intel stating that they are disaggregating chip design from process node technology, at some point there has to be a commitment to a process node in order to start the layouts in silicon. At that point the process node procedure is kind of locked, especially when it goes to mask creation.

In the slide, it shows that Intel is going to allow a workflow such that any first gen 7nm design could be back ported to 10+++, any first gen 5nm design could be back ported to 7++, and so on. One can argue that this roadmap might not be so strict with the dates – we have seen Intel’s 10nm take a long time to bake, so expecting the company to move with a yearly cadence on + updates alongside a two-year cadence with main process technology nodes would appear to be a very optimistic and aggressive cadence strategy.

Note that this isn’t the first mention of back porting hardware designs when it comes to Intel. With the current delays to Intel’s 10nm process technology, it has been widely rumoured that some of Intel’s future CPU microarchitecture designs, originally designed with 10nm (or 10+, 10++) in mind might actually find a home on a 14nm process due to the success of that process node.
 

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