Jan Olšan
Senior member
- Jan 12, 2017
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It's a norm in the mobile/ARM ecosystem as such (or perhaps x86/PC is the odd helpful one in the first place).
Have you ever seen TDP value quoted for *any* phone SoC?
Have you ever seen TDP value quoted for *any* phone SoC?
poke01
Diamond Member
- Mar 8, 2022
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Nope
TDPs are funny in laptops and frankly kinda useless especially the way Intel implements them.
Take the 226V, Intel rates the turbo TDP as 37watts maximum but the SoC goes up to 55 watts under full load which Intel does not mention. The base TDP is 17watts which is only useful if turbo boost is turned off.
And the way AMD implements them on mobile CPUs is better but still vague, they give a default TDP and a configurable TDP.
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Why would they? It is meaningless since you can't choose another CPU for your phone or build your own. It started in the PC world because you can select different models with different CPUs, or buy a CPU and install it in a board yourself and you need to know what kind of cooling it requires.
fastandfurious6
Senior member
- Jun 1, 2024
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can't be true......
if true then amd will lose #1.... why would they concede lead just to save some bucks?
Lisa Su says AMD is on track to a 100x power efficiency improvement by 2027.
Remember Lisa Su mentioned AMD is going to achieve 100x (times not percentages) power efficiency improvement by 2027. Verano seems to be the platform for it. No, it is not Zen6c platform refresh (Venice with 256-core consumes about 600W TDP), it is going to be new ARM platform with focus on power efficiency so that AMD could divert the power onto GPU/AI just like NV's Vera.
NV's Vera is targeting for end of 2026. AMD's Verona is a total platform solution, the CPU cores could be ready by those times as well. If I have to guess, Qualcomm's ARM server CPU could be ready by end of 2026/2027 pending roadmap unveiling. And the man behind all the changes is Microsoft's WoA Server Edition. Just like client platform, Microsoft is the one initiated and set the rules (70TOPS AI) for upcoming WoA 12. It is the new operating system for next decade focusing on AI. Qualcomm, NV, AMD and Mediatek are going to pursue the opportunity. Except Intel
, that's why Intel bets heavily on foundry business..If 70 TOPS is mandatory requirement for Windows 12, AMD's Gorgon Point and Intel's PTL are not able to meet Co-Pilot++ status. I bet all new ARM SoCs are able to achieve that including AMD's Soundwave.
I have already done explaining the changes behind in the past pages, let's wait for Soundwave and WoA12 unveiling...
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So that I understand, they spent a bunch of time convincing people that you need more CPU grunt to get the most out of GPU. You think that AMD doing a from scratch Arm design is the way they will get above zen 6 performance?Lisa Su says AMD is on track to a 100x power efficiency improvement by 2027.
Remember Lisa Su mentioned AMD is going to achieve 100x (times not percentages) power efficiency improvement by 2027. Verano seems to be the platform for it. No, it is not Zen6c platform refresh (Venice with 256-core consumes about 600W TDP), it is going to be new ARM platform with focus on power efficiency so that AMD could divert the power onto GPU/AI just like NV's Vera.
NV's Vera is targeting for end of 2026. AMD's Verona is a total platform solution, the CPU cores could be ready by those times as well. If I have to guess, Qualcomm's ARM server CPU could be ready by end of 2026/2027 pending roadmap unveiling. And the man behind all the changes is Microsoft's WoA Server Edition. Just like client platform, Microsoft is the one initiated and set the rules (70TOPS AI) for upcoming WoA 12. It is the new operating system for next decade focusing on AI. Qualcomm, NV, AMD and Mediatek are going to pursue the opportunity. Except Intel
If 70 TOPS is mandatory requirement for Windows 12, AMD's Gorgon Point and Intel's PTL are not able to meet Co-Pilot++ status. I bet all new ARM SoCs are able to achieve that including AMD's Soundwave.
I have already done explaining the changes behind in the past pages, let's wait for Soundwave and WoA12 unveiling...
Just in case anyone was wondering: The 100× figure is indeed from something the AMD top management has said. But it has of course nothing at all to do with CPU architectures, let alone with a presumed AMD ARM CPU project.
fastandfurious6
Senior member
- Jun 1, 2024
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This figure is about datacenter-level power efficiency in model training, and it takes not only efficiency gains per node and of the rack-level and DC-level interconnects into account, but also speculated software advances. I.e., the figure includes more than AMD's own part of it.
The figure also has a lot to do with the fact that AMD doesn't have an actual integrated rack-level AI solution on the market before 2026, unlike a certain competitor.
Finally, AMD proposing this figure also has a lot to do with countering potential concerns of investors regarding the "The Limits to Growth" (you may want to look it up if it doesn't ring a bell) in AI.
The figure also has a lot to do with the fact that AMD doesn't have an actual integrated rack-level AI solution on the market before 2026, unlike a certain competitor.
Finally, AMD proposing this figure also has a lot to do with countering potential concerns of investors regarding the "The Limits to Growth" (you may want to look it up if it doesn't ring a bell) in AI.
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Panino Manino
Golden Member
- Jan 28, 2017
- 1,150
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Podcast Advent of Computing released an episode about the iAPX286, which got me thinking again.
Besides how "bad" Intel was at that time, that maybe we have am opportunity to get rid of the x86 legacy.
Suppose AMD gets really serious about their ARM CPUs and in a feel years their ARM are as good or better than their Ryzen CPUs. If Intel once again misses the timing and Qualcomm is still trying to bring their CPUs to the desktop and Windows, couldn't the market agree to make the switch? Legacy software could still be run by emulation.
Because one day we'll eventually move on from x86, right?
Can't this day start in the next three years?
Besides how "bad" Intel was at that time, that maybe we have am opportunity to get rid of the x86 legacy.
Suppose AMD gets really serious about their ARM CPUs and in a feel years their ARM are as good or better than their Ryzen CPUs. If Intel once again misses the timing and Qualcomm is still trying to bring their CPUs to the desktop and Windows, couldn't the market agree to make the switch? Legacy software could still be run by emulation.
Because one day we'll eventually move on from x86, right?
Can't this day start in the next three years?
Thunder 57
Diamond Member
- Aug 19, 2007
- 4,206
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I'd bet AMD has some ARM project hidden away, but I doubt that is their priority. Why compete with many when you can compete with one?
Ehhh... I would disagree with calling the NVL72 system a rackscale system as it isn't actually a single system image (SSI) across the whole NVL72 as there are actually 18 system images in a NVL72 system (1 per compute node). Which actually means that the DGX/HGX system is the most GPUs you can get in a single system image, which is the same as the MI350X platform.
Now, if MI400 also isn't a SSI then I would also not call that a rackscale system either... and honestly, SGI beat them all to a rackscale system back in the early '00s with the Altix 3000 series of supercomputers.
(OT) SSI has remained a niche in supercomputing. SSI or not, what matters is that your accelerators have local memory and then there is remote memory, and your application has got to deal with that. As for AI, I admit I am not into it and am not informed what the actual state-of-the art scaling factors [or feasible model sizes] are with one vendor or the other once multiple nodes are involved.
marees
Platinum Member
- Apr 28, 2024
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marees
Platinum Member
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Team Red on WoA - AMD and Samsung
I asked the question one and half year ago, now I have the answer below:
Samsung and AMD have signed a deal in 2019; AMD would supply RDNA IP to Samsung. I wonder why ? TLDW, please read my team green ARM lineup you will get the same reason behind the partnerships between AMD and Samsung. There is a difference though, I am afraid the deal only applies to three SoCs, namely E2400, E2500 and E2600. The reason lies in the table above.
I am expecting Team Red to target 30% out of 100M per year, that would be 30M per year.
I asked the question one and half year ago, now I have the answer below:
Samsung and AMD have signed a deal in 2019; AMD would supply RDNA IP to Samsung. I wonder why ? TLDW, please read my team green ARM lineup you will get the same reason behind the partnerships between AMD and Samsung. There is a difference though, I am afraid the deal only applies to three SoCs, namely E2400, E2500 and E2600. The reason lies in the table above.
I am expecting Team Red to target 30% out of 100M per year, that would be 30M per year.
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Once you guys studied the table, you will know Soundwave is actually a bigger brother of Exynos 2600 with C1 cores. Thus, Soundwave should have same price target of upcoming X2 or Apple M5. However, Qualcomm has released binned version of X2-EE with 128-bit memory bus. Let's check out the specs of X2 Elite with 128-bit LPDDR5x-9600 memory:
Damn impressive, how about upcoming X2 model with 128-bit LPDDR5x-8533? :
Thus my expectation of Soundwave with 128-bit LPDDR5x-9600? is below:
- 12 Prime cores up to 4.7GHz
- 6 performance cores up to 3.4GHz
- X2-90 iGPU running 1.7GHz. Geez, Qualcomm won't even bother to name its GPU. I am expecting 6 WGP x 4 CU = 24CU.
- 80 TOPS (INT8)
- Integrated X75 5G modem
- TDP : ~50W
Damn impressive, how about upcoming X2 model with 128-bit LPDDR5x-8533? :
- 6 Prime cores
- 6 performance cores
- iGPU should have 4 WGP x 4 CU = 16 CU
- 80 TOPS (INT8)
- Integrated 5G Modem
- TDP: ~28W
Thus my expectation of Soundwave with 128-bit LPDDR5x-9600? is below:
- Combination of C1-Ultra and C1-Premium - more than 12 core count (STX and Medusa Premium have 4+8 with SMT)
- RDNA4.5 - at least 12CU
- 80 TOPS (INT8)
- Integrated 5G Modem support?
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RDNA4.5: Real Dual Issue Implementation?
When I appraised E2600 which shown boosted total clock speeds, I thought SF finally improve their PPA with SF2 process. Turn out it is due to the reduction of CU from 16 to 8 in iGPU. Then it hits me: Could RDNA4.5 has finally implement real dual issue design?
Apple has tweaked FP16 pipelines to boost 85% TOPS as explained here. And based on SNL scores, Soundwave's 16CU? might get 78% boost compared to STX's 16CU RDNA3.5.
Soundwave and Exynos 2600 might be getting new generation of RDNA architecture. I would say RDNA4.5 is more like mobile version of RDNA5. That explains why Medusa Point has only 8CU because there are big changes in pipeline design.
When I appraised E2600 which shown boosted total clock speeds, I thought SF finally improve their PPA with SF2 process. Turn out it is due to the reduction of CU from 16 to 8 in iGPU. Then it hits me: Could RDNA4.5 has finally implement real dual issue design?
Apple has tweaked FP16 pipelines to boost 85% TOPS as explained here. And based on SNL scores, Soundwave's 16CU? might get 78% boost compared to STX's 16CU RDNA3.5.
Soundwave and Exynos 2600 might be getting new generation of RDNA architecture. I would say RDNA4.5 is more like mobile version of RDNA5. That explains why Medusa Point has only 8CU because there are big changes in pipeline design.
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Is Intel Panther Lake confirmed to not have an 80tops NPU? With Qualcomm X Elite 2 having 80tops NPU, and with your rumors above about AMD SoundWave having an 80tops NPU as well, it surely points to your rumors of Microsoft brewing some sort of WoA 12 edition. Exciting!
Even though A19 Pro's FP16 shown 85% boost, Geekerwan's benchmarking of 3 real games shown average 54% faster FPS. Thus, I am assuming new RDNA architecture will boost average 40% in FPS, not as high as SNL but more realistic estimation.
AMD is definitely working on new shader architecture, namely GFX125x. As for any new design which boost FPS, AMD will try to hide the technique especially with new ARM platform. Therefore, I am creating tables below trying to demystify the ISA codenames. If anyone has any new info, feel free to pitch in.
| GFX11.5 - RDNA 3.5 | CU | SP | Shader ISA |
|---|---|---|---|
| Strix Point | 16 | 1024 | gfx1150 |
| Strix Halo | 40 | 2560 | gfx1151 |
| Kracken Point | 8 | 512 | gfx1152 |
GFX12.0 - RDNA 4 | |||
| N44 | 32 | 2048 | gfx1200 |
| N48 | 64 | 4096 | gfx1201 |
| GFX12.5 - RDNA 4.5? | Platform | CU (New ISA) | CU (Old ISA) | Shader ISA |
|---|---|---|---|---|
| Exynos 2600 | ARM | 8 CU | 16 CU | |
| Soundwave | ARM | 12 CU? | 24 CU | |
| Medusa Point MDS1 | x86 | 8 CU | 16 CU | |
| Medusa Point MDS2 | x86 | 4 CU | 8 CU | |
| Medusa Point MDS3 | x86 | 2 CU | 4 CU |
| GFX13.0 - RDNA 5? | Platform | CU (New ISA) | CU (Old ISA) | Shader ISA |
|---|---|---|---|---|
| Medusa Premium | x86 | 24 | 48 | |
| ARM + AT4 ? | ARM | 24 | 48 | |
| Medusa Halo | x86 | 48 | 96 | |
| ARM + AT3 ? | ARM | 48 | 96 | |
| AT2 | x86 | 64 | 128 | |
| AT0 | x86 | 154 | 308 |
PS: Almost all the above new SoCs / GPUs are targeting to be released in 2027; well except E2600 and Soundwave....
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Yep, ARM has published latest ISA, ARM v9.7-A this month. I have updated the table above to show the progress of ARM ISA. Usually it takes 3-4 years for new ISA to be released as end product. Sometimes, C1 could mix features from v9.3-A and v9.4-A. That's mean ARM v9.7-A SoC could be released by the end of 2029.
The upcoming NV Vera most likely based on V9.4-A with SMT support. And all the vendors are accessing the same ISA, it is up to them to custom with features like SMT, that includes Apple, Qualcomm and AMD.
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Finally! I think this is where AMD could excel with their ARM APU. Their SMT implementation seems to be the strongest in the industry. Well, if you discount IBM but they operate in niche markets.
NTMBK
Lifer
- Nov 14, 2011
- 10,492
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Why would AMD actively torpedo the x86 market?
And there have been ARM SMT implementations for years, even SMT4. This isn't some new development.
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