Discussion Zen 7 speculation thread

[Fjodor2001]

Yeah man you don't need any of that.

Perhaps not me but gamers will.

 

[adroc_thurston]

Perhaps not me but gamers will.

Gamers need a single added cache tile.

 

[Fjodor2001]

So why will they go with 2x cache tiles per CCD for Zen8.

 

[Joe NYC]

These things will never, ever be CPU-limited.

True, things tend to be customer demand limited.

If mobile chips with V-Cache stimulate customer demand, it's all that matters.

 

[adroc_thurston]

things tend to be customer demand limited.

Customer really really does not care what's the chip inside they laptop.

If mobile chips with V-Cache stimulate customer demand, it's all that matters.

Only a select subset of DIYers gets a raging erection at stacked LLCs.

 

[Joe NYC]

Also from that slide:

View attachment 135034
Which says: "No support for 2-Hi V-Cache. This further suggests that AMD won't "double stack" V-Cache slices on client until Zen 8 at the earliest"

At the same time we have this however:

AMD Ryzen 9 9950X3D2 & Ryzen 7 9850X3D CPUs - Here's Everything We Know About The 'Soft Refresh' of Zen 5 3D V-Cache Series

AMD is preparing to launch new Zen 5 X3D CPUs, the Ryzen 9 9950X3D2 & Ryzen 7 9800X3D, which carry on the legacy built by the 9000X3D family.

wccftech.com

Suggesting 9950X3D2 will have "192 MB of Cache (Dual X3D CCDs)".

So what to make of that? We'll get 192 MB V-Cache already with Zen5 Refresh SKUs that have 2x CCD, but not 192 MB (or 2x whatever the relevant V-Cache slice will contain) per single CCD until Zen8?

I think what he is denying is rumors of 2-high stacks V-Cache. Meaning, cores in a single CCD would have access to > 200 MB of L3.

9950x3d2 spreads the cache between 2 CCDs, so if a task (such as a game) runs on a single CCD, the 2nd V-Cache is unused.

 

[Fjodor2001]

Gamers need a single added cache tile.

At least you're giving in to 9950X3D2 (and likely also NVL-S 2x144 MB = 288 MB bLLC) which you denied the prospect of previously.

So you'll buy a 16C (9950X3D2) to get top gaming perf and you will like it. No more 6/8C peasant SKU.

 

[Fjodor2001]

I think what he is denying is rumors of 2-high stacks V-Cache. Meaning, cores in a single CCD would have access to > 200 MB of L3.

9950x3d2 spreads the cache between 2 CCDs, so if a task (such as a game) runs on a single CCD, the 2nd V-Cache is unused.

Agreed, and that was exactly what I wrote previously:

So what to make of that? We'll get 192 MB V-Cache already with Zen5 Refresh SKUs that have 2x CCD, but not 192 MB (or 2x whatever the relevant V-Cache slice will contain) per single CCD until Zen8?

 

[adroc_thurston]

At least you're giving in to 9950X3D2 (and likely also NVL-S 2x144 MB = 288 MB bLLC) which you denied the prospect of previously.

neither exist.

So you'll buy a 16C (9950X3D2) to get top gaming perf and you will like it. No more 6/8C peasant SKU.

Games can't really use more than a single CCD effectively.

 

[Joe NYC]

So why will they go with 2x cache tiles per CCD for Zen8.

More interesting is what they are doing in Zen 7, which is an integrated 3D chip, meaning V-Cache is not optional, but there is a 2nd die (mostly SRAM) to is part of inseparable unit.

 

[Joe NYC]

Customer really really does not care what's the chip inside they laptop.

Only a select subset of DIYers gets a raging erection at stacked LLCs.

It is better to be a brand than to be a commodity.

 

[adroc_thurston]

It is better to be a brand than to be a commodity.

Laptop PCs are a commodity market besides Apple (and even Apple is shifting towards being just-another-PC-vendor).

 

[Fjodor2001]

neither exist.

yet

Games can't really use more than a single CCD effectively.

so why will they be releasing 9950X3D2

 

[inquiss]

yet

so why will they be releasing 9950X3D2

They won't be

 

[Fjodor2001]

More interesting is what they are doing in Zen 7, which is an integrated 3D chip, meaning V-Cache is not optional, but there is a 2nd die (mostly SRAM) to is part of inseparable unit.

Sounds interesting, so what does this mean in practice. All Zen7 CPUs will have some V-Cache (or other type of similar cache?), but smaller in size than on X3D SKUs?

Also, is it not using traditional X3D tech, but instead something more similar to NVL-S bLLC?

 

[Fjodor2001]

They won't be

So they'll be lagging behind NVL-S 288 MB bLLC?

 

[Joe NYC]

At least you're giving in to 9950X3D2 (and likely also NVL-S 2x144 MB = 288 MB bLLC) which you denied the prospect of previously.

So you'll buy a 16C (9950X3D2) to get top gaming perf and you will like it. No more 6/8C peasant SKU.

9950x3d2 would not be targeting gamers. It's a waste of money for gamers.

If there is anything that gamers would like, it would be a 6 core V-Cache chips. In many games, it would perform very close to 8 core version, except, their stock and boost clocks are lower.

 

[Fjodor2001]

9950x3d2 would not be targeting gamers. It's a waste of money for gamers.

Because you are assuming all games only use max 8C, 4-ever? What about those who use more, now and in the future?

And if not targeting gamers, what would 9950X3D2 be targeting?

 

[adroc_thurston]

so why will they be releasing 9950X3D2

idk the thing does not exist

 

[adroc_thurston]

Because you are assuming all games only use max 8C, 4-ever?

yeah.

What about those who use more, now and in the future?

they don't and future consoles give you more 1t (hello Zen6), not moar threads.

 

[Fjodor2001]

idk the thing does not exist

yet

 

[Fjodor2001]

yeah.

A few years ago you said 4C was the limit, now you say 8C is the limit.

Soon you'll agree 16C is the (current) limit.

 

[inquiss]

So they'll be lagging behind NVL-S 288 MB bLLC?

That, if it's made, will lose to a single CCD with vcache. For games you want a single CCD with a slab of vcache. That's it. One ccd with one vcache slice please. That's all gamers need. That's it.

 

[inquiss]

yet

Remindmein2years!

 

[adroc_thurston]

yet

ever.

A few years ago you said 4C was the limit, now you say 8C is the limit.

Soon you'll agree 16C is the (current) limit.

dawg game code is inherently serial.