Discussion Zen 7 speculation thread

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soresu

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Valve is waiting for something like Zen 7? Call me skeptical, but Valve has made it quite clear by now, both in action and interviews, that they're not interested in adopting the current gen architectures for their hardware because they want to pursue volume at low cost. If Valve is waiting for Zen 7, then that means we shouldn't expect a Steam Deck 2 until after the launch of Zen 8. Maybe they are, but does that mean we're potentially 5+ years away from a SteamDeck 2?
They were actually quite specific that what they want is to be able to field a successor with significantly better performance (2-3x at least I'd assume) at the same battery life.

On the OLED varient side that might actually be a little easier as blue PHOLED is now more or less cracked (at least matching green PHOLED lifetimes), so that's already a pretty significant power saving from what is likely to be the biggest power drain in the console.
 

Joe NYC

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There are no monolithic low power rdna 5 apus with zen 6 medusa

If Zen 7 is 2028, it might be a good idea for AMD to have a real Medusa refresh in mid to late 2027, to update Medusa 1 die to Medusa 1 with RDNA5, and possibly also define a new socket with LPDDR6...
 

adroc_thurston

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If Zen 7 is 2028, it might be a good idea for AMD to have a real Medusa refresh in mid to late 2027, to update Medusa 1 die to Medusa 1 with RDNA5, and possibly also define a new socket with LPDDR6...
Dawg AMD killed the og KRK's (the ones with Z5+ and RDNA4.5) specifically to never do things like that ever again.
 
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Joe NYC

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Dawg AMD killed the og KRK's (the ones with Z5+ and RDNA4.5) specifically to never do things like that ever again.

RDNA5 will be a bigger deal, which would be the main reason to do it. To have RDNA5 across the stack. AMD could even get some marketing mileage out of it, in being the same technology as PS6.

But if Zen 7 is really on its heels, such as H2 2027 release, it would not make sense. Only if Zen 7 is mid 2028.
 

adroc_thurston

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RDNA5 will be a bigger deal, which would be the main reason to do it. To have RDNA5 across the stack
People dgaf about iGPUs.
If you really want it, you can get the two MDS parts that have it (for a price).
AMD could even get some marketing mileage out of it, in being the same technology as PS6.
Man you just gotta be honest and admit better iGPs make you hard.
But if Zen 7 is really on its heels, such as H2 2027 release, it would not make sense. Only if Zen 7 is mid 2028.
Yeah CPU/fabric IP matters much much more which is why AMD rechopped their roadmap around major updates there.
 
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Joe NYC

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People dgaf about iGPUs.
If you really want it, you can get the two MDS parts that have it (for a price).

If the Medusa Halo Mini is using 2 channels of LPDDR5 and full Medusa Halo has 4 channel LPDDR6, then it seems like AMD will need something that will be in the middle and will become a basis of future mainstream notebooks - - 2 channel LPDDR6.

Such a socket would be a better fit for both Medusa Halo Mini and Medusa 1 (Version 2), with RDNA5 and LPDDR6

Yeah CPU/fabric IP matters much much more which is why AMD rechopped their roadmap around major updates there.

It seems like AMD is doing something with "Verano" + Mi450 that may be IO related, but maybe something even bigger is coming later.

An interesting tweet today from Hot Aisle:

 

Josh128

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RDNA5 will be a bigger deal, which would be the main reason to do it. To have RDNA5 across the stack. AMD could even get some marketing mileage out of it, in being the same technology as PS6.

But if Zen 7 is really on its heels, such as H2 2027 release, it would not make sense. Only if Zen 7 is mid 2028.
Bruh we'll be lucky to get desktop Zen 6 before Q1 2027, and there's ZERO chance of getting desktop Zen 7 in 2027. What is everyone smoking, it must be some pretty good shat?
 

adroc_thurston

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If the Medusa Halo Mini is using 2 channels of LPDDR5 and full Medusa Halo has 4 channel LPDDR6, then it seems like AMD will need something that will be in the middle and will become a basis of future mainstream notebooks - - 2 channel LPDDR6.

Such a socket would be a better fit for both Medusa Halo Mini and Medusa 1 (Version 2), with RDNA5 and LPDDR6
They don't need a filler between two high-end parts.
They also won't ever do a full on SoC rebuild to swap in a newer GPU IP no one gives a squat about.
It seems like AMD is doing something with "Verano" + Mi450 that may be IO related, but maybe something even bigger is coming later.
a) Verano is for MI500 gen
b) MI400 itself is I/O related since it's composable. Tons of stuff that's boring nerd garbage you'll never be interested in.
 
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Joe NYC

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a) Verano is for MI500 gen
b) MI400 itself is I/O related since it's composable. Tons of stuff that's boring nerd garbage you'll never be interested in.

You are right, I forgot that Verano is for Mi500

Could it have some custom IO beyond PCIe Gen 6 or is AMD sticking with the standards and perhaps moving to PCIe Gen 7?

Might be too early for PCIe 7 in 2027.
 

Thunder 57

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Bruh we'll be lucky to get desktop Zen 6 before Q1 2027, and there's ZERO chance of getting desktop Zen 7 in 2027. What is everyone smoking, it must be some pretty good shat?

According to who? MLID? TSMC slides?
 

adroc_thurston

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Could it have some custom IO beyond PCIe Gen 6 or is AMD sticking with the standards and perhaps moving to PCIe Gen 7?
Dawg MI450 setup is already all in xGMI/UAL domain.
And yeah Verano is a speeds and feeds bump for the serdes shoreline to accommodate MI500 being much much faster
 
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soresu

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Dawg AMD killed the og KRK's (the ones with Z5+ and RDNA4.5) specifically to never do things like that ever again.
Which would make a lot more sense if they hadn't also killed any RDNA4 APUs, assuming any existed in the first place.

Seems like a waste to have put so much effort into the µArch only to make just 2 dGPU dies from it.

Unless PS5 Pro APU development subsidized it, so the losses aren't so bothersome?
 
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adroc_thurston

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Which would make a lot more sense if they hadn't also killed any RDNA4 APUs, assuming any existed in the first place.
APUs were always 4.5.
Seems like a waste to have put so much effort into the µArch only to make just 2 dGPU dies from it.
Three halo parts were cut off.
The HPC accelerators live on (hallo MI400).
Unless PS5 Pro APU development subsidized it, so the losses aren't so bothersome?
Semi-custom stuff subsidizes nothing and is in no way attached to any part of AMD's roadmap.
 

soresu

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Semi-custom stuff subsidizes nothing and is in no way attached to any part of AMD's roadmap.
So Sony paid nothing for RDNA4 development?!

Jeez that makes it even worse.

I guess they will make a big return from GFX1250 so it is still a win even if it's not all RDNA4.
 

soresu

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Nope.
You'll just have to pay more.
Someone will I'm sure - but no me.

I got my 9060 XT back in June and I'm perfectly happy to wait until prices come back down again to go AM5/DDR5 for Zen6.

I might even skip it entirely for Zen7 to get a more substantial IPC and core count boost from my 3950X.
 

adroc_thurston

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Josh128

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So Sony paid nothing for RDNA4 development?!

Jeez that makes it even worse.

I guess they will make a big return from GFX1250 so it is still a win even if it's not all RDNA4.
Considering Sony doesnt use RDNA4, why would they? Project Amethest is a joint effort, but I doubt it had much if any, impact on the development of RDNA 4, even if PS5 Pro may implement some RDNA 4 IP in its semi-custom GPU.
 
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soresu

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Considering Sony doesnt use RDNA4, why would they? Project Amethest is a joint effort, but I doubt it had much if any, impact on the development of RDNA 4, even if PS5 Pro may implement some RDNA 4 IP in its semi-custom GPU.
RT and ML compute in PS5 Pro's APU is RDNA4.
 

Fjodor2001

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From previous discussions in this thread, the current assumption is that Zen7 will be 32C/64T for top SKU and 16C/32T per CCD on DT.

If that turns out to be the case, then what can be expected for the bottom SKU, e.g. 12C/24T? That would map to the current case for Zen5 where we have 8C/16T for a fully working CCD, and 6C/12T for bottom SKU which is 75% of the fully working one.
 
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