Zen 7-8% is honestly not much more impressive than Zen 5%. 🤣
At Computerbase.de, where they were testing different games and at 1080p instead of 720p, it was 13-14%.
And how do you know this will be the case for NVL-S with bLLC too?
This has been explained before, but one of the reasons is physical design.
The only reason AMD can do such big L3s at such low latencies at all is the vertical stacking, because thanks to the layers being very thin, physical distance to the farthest SRAM cells doesn't increase much, despite the tripling of the total L3.
A monolithic massive 2D cache like Intels bLLC has more distance/cells to cover from corner to corner, making it much harder to get high clocks and low latency under the same hood without running into heat/power/clock/degradation issues.
The other aspect is, both vendors use exclusive cache designs nowadays, where L3 is only accessed when some data isn't found in the L2, and since Intel's P-cores have 3x as much L2 (and that extra L1.5D), they don't need to access L3 as often and as early, while also going through higher total latency before doing so (Intel's L2 has higher latency than AMD's).
Basically, Intel L3 is accessed less often for small stuff, and takes longer to access for big stuff, both by design.
Making it bigger won't improve either, that only reduces the even slower memory accesses.