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Question Zen 6 Speculation Thread

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jdubs03 said:
Or A14P might be more appropriate. But since SPR yields a bit better density, A12 could indeed work.
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Well I assume the A14P name has been "reserved" for the inevitable optical shrink node like we saw with N7P, N5P, N3P and N2P. I think they chose A16 for N2P+BSPDN rather than calling it something like N2PB to highlight the improved density (even though the density gain is sort of an "it depends" on wire routing conflicts rather than a fairly specific amount as with the 'P' variant optical shrinks)

So if I had to bet I'd guess we'll see the backside variant called A12 rather than something like A14B.
 
Doug S said:
Nvidia is reportedly the "first and only customer" for A16.
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Only customer for now, sure. It depends on time schedules. A16 might just fall in a window, where AMD could choose differently:
- Zen 6 is ~N2P
- MI400 and MI500 are ~N2P/X
- Zen 7 and MI600 will hit the market 2028
- A14 is projected to arrive 2028
- A14 with SPR (super power rail) is projected to arrive 2029

A14 is not that much better than A16 regarding performance and energy efficiency, but it brings additional area scaling benefits.
AMD could still chose A16 for Zen 7 and MI600. But they might not have made the decision yet.
 
basix said:
Only customer for now, sure. It depends on time schedules. A16 might just fall in a window, where AMD could choose differently:
- Zen 6 is ~N2P
- MI400 and MI500 are ~N2P/X
- Zen 7 and MI600 will hit the market 2028
- A14 is projected to arrive 2028
- A14 with SPR (super power rail) is projected to arrive 2029

A14 is not that much better than A16 regarding performance and energy efficiency, but it brings additional area scaling benefits.
AMD could still chose A16 for Zen 7 and MI600. But they might not have made the decision yet.
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chips fabricated on BPD/BSPDN inevitably become HPC chips that mandatorily require liquid cooling.

using a BSPDN-enabled node to fabricate a chip dramatically increases design complexity

https://twitter.com/x/status/2017809609474601145
 
marees said:
chips fabricated on BPD/BSPDN inevitably become HPC chips that mandatorily require liquid cooling.

using a BSPDN-enabled node to fabricate a chip dramatically increases design complexity
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This is both extra stupid and extra wrong.
You can go buy PTL and it's normal client stuff with backside power.
 
ETI4711 said:
TSMC is a foundry and must meet the deadlines promised to its customers. That is why TSMC takes as few risks as possible and avoids introducing two new technologies at once.


BSPDN can only be used if the chip is very well cooled. BSPDN is not suitable for applications without active cooling.

TSMC itself says that BSPDN was designed for HPC. And some say that A16 was developed for Nvidia.
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With AMD's "Server First" design approach, seems like BSPDN might work well for DC and AI chips. Might be good enough to justify the hit in desktop since it might ALSO work well for mobile (really any application where lower power outweighs higher clock speeds).
Doug S said:
A16 is BSPDN only. A14 will have BSPDN and non BSPDN flavors, though it is unclear if they will share the same A14 name, or the BSPDN version will be called something like A12 similar to how N2P+BSPDN was rebranded as A16.
Click to expand...
Thanks for the correction. A16 BSPDN looks like N2 with BSPDN. I agree. Seems like they might want to call the next gen A14 and A12 ..... just due to the likely density difference. It's a harder call though IMO since it is likely that N2 will clock higher than A16 and that A14 will clock higher than A12.
adroc_thurston said:
There's absolutely zero difference with regards to thermals.
They're the exact same heat traps with pdn water sitting on top of your logic stack.
Click to expand...
There are other difference that may well effect yields and clock speeds.
 
fastandfurious6 said:
Prophecy #212: by the time we reach 1nm proper, computing will be a resolved problem
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Why not make a new thread like you did in the Grapics subforum. For starters how do you even define 1nm proper? Does 18A count? Without quantum computing breaking (certain) encryption simply isn't feasable. But honestly other than specialised tasks like that which have been proven to be possible most people seem to overestimate what quantum computing may bring.
 
Thunder 57 said:
Why not make a new thread like you did in the Grapics subforum. For starters how do you even define 1nm proper? Does 18A count? Without quantum computing breaking (certain) encryption simply isn't feasable. But honestly other than specialised tasks like that which have been proven to be possible most people seem to overestimate what quantum computing may bring.
Click to expand...
Maybe the general public overestimate what Quantum can bring. A good friend of mine works on the design side of Quantum and they're fully aware of the limitations of Quantum and have no intentions at all of targeting the general consumer or datacenter market - just specific commercial and scientific usecases where it excels.
 
MoistOintment said:
Maybe the general public overestimate what Quantum can bring. A good friend of mine works on the design side of Quantum and they're fully aware of the limitations of Quantum and have no intentions at all of targeting the general consumer or datacenter market - just specific commercial and scientific usecases where it excels.
Click to expand...

Sounds about right. I'm sure the people working on it know the applications and know it isn't for the general public. In some cases though it excels.
 
MoistOintment said:
Maybe the general public overestimate what Quantum can bring. A good friend of mine works on the design side of Quantum and they're fully aware of the limitations of Quantum and have no intentions at all of targeting the general consumer or datacenter market - just specific commercial and scientific usecases where it excels.
Click to expand...

For now and the next decade or three, that is likely true, for client at least.

By comparison, you will see nuclear fusion commercialized before you see a quantum desktop PC (though to be fair, nuclear fusion is getting very close! Just 5 more years 🤣)
 
I very much hope so that some RDNA4 parts get used. Vanilla RDNA 3.5 is OK for desktop Zen 6, but not future mobile parts.
If I had to guess, RDNA4 matrix acceleration would be the most helpful addition. Good temporal upsampling and FG support. With respectie additional ML/AI use cases outside of games (amortization of silicon cost).
The enhanced power and bandwidth efficiencies of RDNA4 would also be good, because mobile GPUs are always starving on these fronts. Faster raytracing: Not that important for such a small iGPU.

Update in the news article:
There is also now a merge request adding new FP8/BF8 conversion instructions for the GFX1170 target.
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Looks like that gfx1170 gets same FP8 instructions as RDNA4. Now is the question: Increased throughput as well with additional matrix accelerators (like RDNA4) or is it more RDNA3 alike WMMA?
 
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Why should Xclipse be part of LLVM patches? Or are there any other signs of older Xclipse generations within LLVM from AMD?
 
ToTTenTranz said:
New iGPU from the GFX11 family, that is being called "RDNA 4m".

RDNA 4 is GFX12, so this should be RDNA3.x with something on top.


I wonder if we're looking at Medusa's iGPU.


AMD Introduces New GPU Target To AMDGPU LLVM: GFX1170 "RDNA 4m" - Phoronix

www.phoronix.com www.phoronix.com
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Interesting.
I had already somewhat hoped that the "+" in "RDNA3.5+" would mean more than just higher clocks thanks to N3P/C.

For as good as RDNA4 is, N44 being virtually the same size on N4P as N33 on N6P suggest that RDNA4 "buys" a lot of that improved PPW and IPC through lots of additional transistors.
So at least in terms of PPA on the same process, it doesn't actually seem to be that much better than RDNA3(.5), strictly from a raster games perspective.
N33 on N4P with RDNA3.5 improvements and maybe doubled L2, might not have done much worse than N44, at least in terms of perf/mm² and perf/W (outside RT and FSR4, of course).

An RDNA3.7 hybrid uArch that only picks some select juicy PPA/PPW fruits from the full RDNA4 "tree" (or at least supports proper FP8 FSR4) might actually work better in terms of PPA for a small iGPU than full RDNA4 may have.

Josh128 said:
Samsung 2nm RDNA 4 mobile GPU?
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Maybe, though the GFX1170 still suggests it's still more "RDNA3.5 + even more RDNA4 steroids" than full RDNA4.
It's also not impossible that both Samsung and AMD will use this IP in their upcoming APUs.
 
gfx1170 as GPU for Xclipse, Medusa Point (and maybe desktop Zen 6) might make sense. But I have a few objections, it just does not match together:
- Samsung touts massive raytracing improvements for Xclipse 960. This indicates a closer relationship to "full RDNA4"
- Medusa Point will be manufactured in N3P
- Desktop IOD will probably use an N4 derivate. If N3: Cool, then it matches at least for Zen 6 chips (but will be expensive for desktop)
 
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