Question Zen 6 Speculation Thread

[Josh128]

LOL. Always. Do the impossible .... with nothing ..... by tomorrow .

"There is never enough time to do it right ..... but there is always time to re-do it".

Seems inevitable really. 50% more cores and a double node shrink.

I am thinking that the IPC improvement is going to be anemic though. Any ST improvement will likely be through clock speed increases.

We already have official internal slides showing ~10% IPC projections. Its happening. Zen 5 was a brand new architecture that was "supposedly" backported. New architectures ALWAYS have some wish list items that didnt make it due to time constraints. If Zen 5 really was backported, there will be some additional room for improvement on a 2nm process (IF its actually 2nm and not 3nm- I still think its possible they might shatter everyones dreams here of 2nm desktop).

Regardless, even 3nm will allow some room for these things, it just needs to hit good speeds too.

 

[adroc_thurston]

I still think its possible they might shatter everyones dreams here of 2nm desktop

It's N2p server.
Desktop and others are additional uses of the CCD.

 

[Josh128]

It's N2p server.
Desktop and others are additional uses of the CCD.

The only 2nm "Venice" we know of from official sources is the 256C SKU though, which supposedly uses 32C CCX/CCDs. Lisa even said "Cloud Service Providers" are testing them. Thats Zen 6C(loud) stuff. Those aint coming to desktop.

 

[adroc_thurston]

The only 2nm "Venice" we know of from official sources is the 256C SKU though, which supposedly uses 32C CCX/CCDs.

Venice-Classic is very much 96c Z6 on N2p.
On SP8.
Idk why you're so desperate for it to not be N2p. Will that own the libs?

 

[BorisTheBlade82]

I like your outlook on ST. This is what everyone here is hoping for, I just cant bring myself to really believe it will clock any faster than 6.2ish. I sincerely hope Im wrong though.

Yeah, I know. To provide you with some armchair reasoning:

TSMC by themselves say, that at ISO power N2P should be around 23% faster than N4. In my book this might translate to IPC or frequency in whatever proportion. So as 10% IPC was on internal slides, this would translate to (slightly optimistic) 14% frequency increase - and in ST small power increases do not matter that much.

For Venice, AMD is on record for a 1,7x performance increase compared to its predecessor. When taking out the 33% core count increase, you land at 28% per core increase. Obviously, we have no clue about TDP increase, we are talking about different points on the V/f curve, the impact of the new interconnect, yada yada. But somehow the numbers are neatly close to each other.

 

[Josh128]

Venice-Classic is very much 96c Z6 on N2p.
On SP8.
Idk why you're so desperate for it to not be N2p. Will that own the libs?

Do you have a source you can cite on that at all?

I hope it is all on N2. What libs? Libations? Liberace? Librarians?? Lib-Bu-Tan???

 

[gdansk]

For Venice, AMD is on record for a 1,7x performance increase compared to its predecessor. When taking out the 33% core count increase, you land at 28% per core increase. Obviously, we have no clue about TDP increase, we are talking about different points on the V/f curve, the impact of the new interconnect, yada yada. But somehow the numbers are neatly close to each other.

You're not being cautious enough despite knowing that server all core frequency (what AMD was talking about for 1.7x) and desktop fmax are different.

One is the focus of AMD and the other is a "oh that'd be nice".

 

[BorisTheBlade82]

You're not being cautious enough despite knowing that server all core frequency (what AMD was talking about for 1.7x) and desktop fmax are different.

One is the focus of AMD and the other is a "oh that'd be nice".

I know, I know - if the first paragraph is not sufficient for you, just call me an optimist 😄

Regarding ST this is near, but still below Zen4 - but this time with a lot of added cores for some MT Oomph!

 

[adroc_thurston]

Do you have a source you can cite on that at all?

Yeah, xino posted it on twitter too.
It's N2p.

 

[StefanR5R]

We already have official internal slides showing ~10% IPC projections.

Nitpicks:
– It was one slide. The slide was neither official nor internal nor "official internal". It was alleged to be from AMD shown to whomever. In short, a rumor. And old by now, but still popular.
– The slide said "10%+ IPC increase".
– Almost everybody who uses the term "IPC" doesn't actually refer to IPC. This includes most uses of "IPC" by AMD. Rather, they refer to either clock-normalized performance in workload XYZ or to iso-clock performance in workload XYZ. Workload can be a certain mix of workloads.
– The performance speculations on the last couple of pages here in this thread was about Cinebench R23 specifically. If it was indeed AMD who projected "10%+ IPC increase", then Cinebench R23 was probably not a part of the workload mix on which the projection was based on.

 

[Josh128]

Nitpicks:
– It was one slide. The slide was neither official nor internal nor "official internal". It was alleged to be from AMD shown to whomever. In short, a rumor. And old by now, but still popular.
– The slide said "10%+ IPC increase".
– Almost everybody who uses the term "IPC" doesn't actually refer to IPC. This includes most uses of "IPC" by AMD. Rather, they refer to either clock-normalized performance in workload XYZ or to iso-clock performance in workload XYZ. Workload can be a certain mix of workloads.
– The performance speculations on the last couple of pages here in this thread was about Cinebench R23 specifically. If it was indeed AMD who projected "10%+ IPC increase", then Cinebench R23 was probably not a part of the workload mix on which the projection was based on.

At this point the slide has been absolutely proven legit beyond a shadow of a doubt. It was put out when everyone was still hopium for +40% IPC and was right on the money. The " New Low power core" option was given starting at Zen 5, and it never saw the light of day, but that just means they chose not to deploy it then. We now believe Zen 6 comes with it.

As for the Cinebench R23 IPC, why would you say it was probably not part of the workload mix the projection was based on?? Zen 5's official IPC calculation slide certainly included it.

 

[Hulk]

At this point the slide has been absolutely proven legit beyond a shadow of a doubt. It was put out when everyone was still hopium for +40% IPC and was right on the money. The " New Low power core" option was given starting at Zen 5, and it never saw the light of day, but that just means they chose not to deploy it then. We now believe Zen 6 comes with it.

As for the Cinebench R23 IPC, why would you say it was probably not part of the workload mix the projection was based on?? Zen 5's official IPC calculation slide certainly included it.

View attachment 133232

Good info. I think 17% was a bit optimistic. Based on reported scores in CB R23 I'm seeing more like +13% for MT and +9% for ST. Still, as you noted definite IPC improvements.

 

[fastandfurious6]

View attachment 133214

desktop defaults / no tuning = ~70000

OC + water = ~80000


but most important prediction:

Laptop 24c zen6 defaults = ~60000

Laptop OC = up to ~70000

 

[OneEng2]

You are thinking of batch processing, not live processing. The latter means that there are mere milliseconds worth of data to work with.

Agree. Live is done with DSP chips specifically designed to handle this task with very low latency (sub mSec).

My X32 digital mixer has 0.7mSec latency through the entire processing chain. That's impressive.

We already have official internal slides showing ~10% IPC projections. Its happening. Zen 5 was a brand new architecture that was "supposedly" backported. New architectures ALWAYS have some wish list items that didnt make it due to time constraints. If Zen 5 really was backported, there will be some additional room for improvement on a 2nm process (IF its actually 2nm and not 3nm- I still think its possible they might shatter everyones dreams here of 2nm desktop).

Regardless, even 3nm will allow some room for these things, it just needs to hit good speeds too.

I tend to agree only because it makes sense.

Idk why you're so desperate for it to not be N2p. Will that own the libs?

LOL. Funny.

I would call it "realistic" vs "desperate for it to not be N2p".

 

[adroc_thurston]

I would call it "realistic" vs "desperate for it to not be N2p".

Realistic FUD about a part that taped out a while ago?

 

[BorisTheBlade82]

desktop defaults / no tuning = ~70000

OC + water = ~80000


but most important prediction:

Laptop 24c zen6 defaults = ~60000

Laptop OC = up to ~70000

In order to spare @Hulk some type-work, would you please be so kind as to provide us with your ST Score, ST freq and MT freq, max. TDP assumptions as well in order to complete your entry?

 

[OneEng2]

Realistic FUD about a part that taped out a while ago?

Link please.

 

[Josh128]

Good info. I think 17% was a bit optimistic. Based on reported scores in CB R23 I'm seeing more like +13% for MT and +9% for ST. Still, as you noted definite IPC improvements.

It is a curious case indeed because this slide was not a projection-- it was delivered to the public at the time of Zen 5's launch. For the life of me I have no clue how they got 17%. Maybe at a locked 4GHz scenario or something? If anyone wants to test this, Im willing to try it with my 9900X against their Zen 4 chip.

 

[Khato]

I'll happily believe that Venice uses N2 (not N2p) given the AMD press release regarding such - https://www.amd.com/en/newsroom/pre...es-first-tsmc-n2-product-silicon-milesto.html

 

[Geddagod]

I'll happily believe that Venice uses N2 (not N2p) given the AMD press release regarding such - https://www.amd.com/en/newsroom/pre...es-first-tsmc-n2-product-silicon-milesto.html

TBF I think the difference is almost semantics. The difference is ~5% perf/watt.
Mediatek confirmed they will be launching N2P products by the end of 2026, so it's not impossible for the node to be N2P.

 

[gdansk]

Simplest to call it 2nm. That way we can stop arguing if it's N2, N2P, or N2 with some previews of N2X here and there.

 

[Hulk]

It is a curious case indeed because this slide was not a projection-- it was delivered to the public at the time of Zen 5's launch. For the life of me I have no clue how they got 17%. Maybe at a locked 4GHz scenario or something? If anyone wants to test this, Im willing to try it with my 9900X against their Zen 4 chip.

I track CB scores in a spreadsheet and I look through quite a lot of data before I "sit on" a number for a particular core. I'm actually seeing +12.8% for MT and +9.3% ST when moving from Zen 4 to Zen 5.

For the record a number of years ago we had a "thing" over IPC. IPC hasn't really been an accurate terms in decades. When we use the term we are talking about "throughput" or the "rate of work" per cycle in a specific workload.

Here is my chart, which is waiting to be updated with Zen 6 data. I don't look for the absolute best, ie... just restarted computer, all non essential apps shut down, tightest timing that can be run for a bench score. I look at what most review sites are getting on these CPU's and then I average results to something I have some measure of faith in.



Here is my data:


and just for fun:

 

[Hulk]

So let's see...

16 P core, 32 E cores, and 4 LPE cores for Nova Lake at the top-of-the-stack.

Let's assume 450 for the "IPC" of the P as calculated in my chart and 375 for the E's.
Furthermore let's assume 5GHz for the P cores, 4GHz for the E cores, and 2.5GHz for the LPE "islands."

That would produce a CB R23 MT score of 87,500. "Don't call it a comeback!"

 

[Josh128]

I track CB scores in a spreadsheet and I look through quite a lot of data before I "sit on" a number for a particular core. I'm actually seeing +12.8% for MT and +9.3% ST when moving from Zen 4 to Zen 5.

For the record a number of years ago we had a "thing" over IPC. IPC hasn't really been an accurate terms in decades. When we use the term we are talking about "throughput" or the "rate of work" per cycle in a specific workload.

Here is my chart, which is waiting to be updated with Zen 6 data. I don't look for the absolute best, ie... just restarted computer, all non essential apps shut down, tightest timing that can be run for a bench score. I look at what most review sites are getting on these CPU's and then I average results to something I have some measure of faith in.



Here is my data:
View attachment 133252

I can confirm the Zen 3 data, I have an old manual 3.5GHz ST run from my previous 5900X. 3600 CL17 Patriot Viper RAM, XMP settings. 329 ST points/GHz. Very interesting that Zen 4 had more R23 ST IPC increase from previous gen than Zen 5 does. Until now I thought it was the other way around.

 

[Josh128]

So let's see...

16 P core, 32 E cores, and 4 LPE cores for Nova Lake at the top-of-the-stack.

Let's assume 450 for the "IPC" of the P as calculated in my chart and 375 for the E's.
Furthermore let's assume 5GHz for the P cores, 4GHz for the E cores, and 2.5GHz for the LPE "islands."

That would produce a CB R23 MT score of 87,500. "Don't call it a comeback!"

That would be a monstrous MT score that desktop Zen 6 wont be touching without some hefty OC. However, I think that guesstimate could be a bit high unless its pulling 300W+, which, knowing Intel, would not be surprising at all. My guess would still be around 80-83K or so. In any case, this is exactly why I believe 24C Zen 6 will top out around 230-250W. 200W would just be leaving too much perf. on the table for AMD given what Intell will likely be doing.