Question Zen 6 Speculation Thread

[Hulk]

I'm memeing.
Trying to read into performance from 1.4-2.0 GHz region is indeed pointless.

Indeed. Looking at the ST score if the frequency is 2.0 then performance is flat over Lion Cove. If frequency is 1.4 then we're looking at 45% better than Lion Cove. Obviously reality is somewhere in the middle, which we could have guessed 10 years ago so the information is meaningless.

 

[Jan Olšan]

Anybody has a score for Ryzen 9 9950X locked to 1.4 GHz?

 

[511]

Anybody has a score for Ryzen 9 9950X locked to 1.4 GHz?

you can calculate that off of a valid score divide by frequency where there is no noise in the datta

 

[Geddagod]

Anybody has a score for Ryzen 9 9950X locked to 1.4 GHz?

the issue isn't getting the Zen 5 data. I'm sure someone can do that, or just use a stock config and accept PPC is going to be marginally higher at 1.4GHz than it is at 5.7GHz.
It's the varying reported frequencies in the Zen 6 sku that is the issue. The sample also hit 2GHz for example, and then also reported 1.5GHz.

 

[511]

the issue isn't getting the Zen 5 data. I'm sure someone can do that, or just use a stock config and accept PPC is going to be marginally higher at 1.4GHz than it is at 5.7GHz.
It's the varying reported frequencies in the Zen 6 sku that is the issue. The sample also hit 2GHz for example, and then also reported 1.5GHz.

It's possible for a CPU to hit all the CPU Frequency in the data but the issue is what's the correct one

 

[adroc_thurston]

the issue isn't getting the Zen 5 data. I'm sure someone can do that, or just use a stock config and accept PPC is going to be marginally higher at 1.4GHz than it is at 5.7GHz.
It's the varying reported frequencies in the Zen 6 sku that is the issue. The sample also hit 2GHz for example, and then also reported 1.5GHz.

you're not gonna calculate perf per clock is the fabric is locked to 400MHz

 

[Doug S]

If you extrapolate the score from the 1.4 GHz clock to 5.7 GHz and assume the usual GB6 score for Zen 5 core at 5.7 GHz is 3550 points, it turns out the IPC has gone up by... /drumroll/

Spoiler: wait for it

38 %

/badum-tssss/

Where do you get the 1.4 from when it shows a max of 2.0? Also you can't take IPC measurements at 1.4 GHz and "extrapolate" to clock rates 4x higher. Memory latency (including perhaps L3 latency) is independent of the CPU core's clock rate and will be 4x worse when measured in cycles.

 

[adroc_thurston]

Where do you get the 1.4 from when it shows a max of 2.0?

It would be max 2.0 if it was 2.0 across the run.
In any case, forget about this one.

 

[CouncilorIrissa]

Where do you get the 1.4 from when it shows a max of 2.0? Also you can't take IPC measurements at 1.4 GHz and "extrapolate" to clock rates 4x higher. Memory latency (including perhaps L3 latency) is independent of the CPU core's clock rate and will be 4x worse when measured in cycles.

It's in the .gb6 dump I posted. There's one reading of 2.0, one of 1.6 and the rest are at 1.4.

 

[Jan Olšan]

Where do you get the 1.4 from when it shows a max of 2.0? Also you can't take IPC measurements at 1.4 GHz and "extrapolate" to clock rates 4x higher. Memory latency (including perhaps L3 latency) is independent of the CPU core's clock rate and will be 4x worse when measured in cycles.

That fact that low core clock can give bogus high performance is exactly why I wanted a Zen 5 at low clock (1.4 GHz seems to be what the bench ran at most of the time?), to see if it also displays that misleadingly large apparent IPC (which clearly would not be real at 5.7 GHz).
Don't want to extrapolate anything (well, already did in the joke post), it's more about having a demonstration of why exactly that should not be done.

(Of course, if we assume the 1T score was actually taken at 2,0 GHz, then we don't have to have this debate, in that case the IPC looks mostly at Zen 5 level).

 

[511]

It's early silicon like very early there ain't no way you are getting correct numbers first time

 

[adroc_thurston]

It's early silicon like very early there ain't no way you are getting correct numbers first time

Well, no, AMD A0 is usually very very functional.
They just cripple RVPs for reasons.

 

[511]

Well, no, AMD A0 is usually very very functional.
They just cripple RVPs for reasons.

Why lmao

 

[jpiniero]

Pretty sure Intel does the same thing.

 

[adroc_thurston]

Why lmao

They don't like people touching their stuff or knowing the perf.
First they replaced fairly descriptive ES names with OPNs, then they started gradually locking down everything.

Pretty sure Intel does the same thing.

Nope.

 

[511]

They don't like people touching their stuff or knowing the perf.
First they replaced fairly descriptive ES names with OPNs, then they started gradually locking down everything.

We can see the descriptive name in the GB leak 🤣🤣

 

[MerryCherry]

Is 6.5 GHz possible for Zen 6 ? Some optimists are even claiming 7 GHz.

Reasons cited;

1. Two process node jumps (4nm to 3nm to 2nm).
2. Option to use HP libraries (AMD gets to 5.7 GHz on Zen5 using only HD libraries, apparently).
3. TSMC Nanoflex.

 

[poke01]

Some optimists are even claiming 7 GHz.

I wouldn’t call them optimists

 

[StefanR5R]

Is 6.5 GHz possible for Zen 6 ? Some optimists are even claiming 7 GHz.

IIRC someone said that 7 GHz was an internal stretch goal, i.e. a mere number in a sadomasochistic play between management and engineering (I may be paraphrasing incorrectly), and actual results tend to turn out lower than such stretch-so-it-hurts goals.

 

[adroc_thurston]

Is 6.5 GHz possible for Zen 6 ?

That's lowballing.

Reasons cited;

1. Two process node jumps (4nm to 3nm to 2nm).
2. Option to use HP libraries (AMD gets to 5.7 GHz on Zen5 using only HD libraries, apparently).
3. TSMC Nanoflex.

Yeah two shrinks and a core sliced for speed do make a difference.

IIRC someone said that 7 GHz was an internal stretch goal

No those are always very real engineering targets.
You can do a lot with two shrinks, tall Nano/Finflex cells, fat chungus eMiMs and other assorted garbage.

 

[Dragonetti031]

That's lowballing.

Better low balling it and be surprised at the better performance you get, then over hyping it and get angry their is no performance improvement. 😉

 

[jpiniero]

Noo it must be Zen 6%!

 

[Jan Olšan]

Process node gains from transistor performance should not be overrated either, that can be spent not just on clock increase itself.
Wasn't the only case where there was such a huge clock jump (Zen 4) also enabled by architectural work? Which, of course, can also happen with Zen 6, but I would not expect a jump as big again (at that point, they were kinda catching up with Intel's gotta go fast frequencies from behind, like Apple is in a way).

I'll already be pleasantly surprised if the jump exceeds +10% at the top (like, >6.3?)

 

[adroc_thurston]

Wasn't the only case where there was such a huge clock jump (Zen 4) also enabled by architectural work?

Zen2 also had fmax bumps.

Which, of course, can also happen with Zen 6

You can just look at the int sched layout.

but I would not expect a jump as big again (at that point, they were kinda catching up with Intel's gotta go fast frequencies from behind, like Apple is in a way).

Nonsense. fmax gains are fmax gains irregarding of what comp does.

I'll already be pleasantly surprised if the jump exceeds +10% at the top (like, >6.3?)

Zen4 did 13% fmax with a single shrink.

 

[Abwx]

Zen4 did 13% fmax with a single shrink.

13% was for IPC, frequency was up by 16.3% from 4.9 to 5.7GHz.