Question Zen 6 Speculation Thread

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511

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I mean Zen 3 on 7nm to Zen 4 on 5nm with the 5800X to 7700X was a 1.125x jump in boost clock speed. I mean a 20% boost in clock speed with two node jumps is 6.72Ghz assuming those Zen 5 X3D refresh CPUs are true. And if AMD is really pushing it then they'd need a 25% boost in clock speed. If they can achieve that without having to push wattage on Zen 6 X3D on N2P that'd be crazy.

But since TSMC N2(P/X) seem to be focusing on clock speed than density increase I suppose that's where a clock speed rumours for Zen 6 is coming from.
Node Jump doesn't absolutely means clock Speed increases and they might have room to spare during N7 time but they don't this time.
 

ondma

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Mar 18, 2018
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idk maybe their E core rules?

You have to look at the complete P+E+LPE+iGPU+etc offering.

What matters is the total solution (ST and MT perf, perf/watt, iGPU, NPU, etc), and the price of that. And what parts of the total solution are important depend on market segment.

So the statement that "But Intel's just not gonna be competitive till UC." does not hold, if you by that mean that only P core performance matters regardless of market segment.
Well, the problem for Intel is that gaming performance is the primary metric for a lot of consumer users in the high end segment. And that is dependent on P cores. Actually, P core performance in gaming is not that bad compared to vanilla Zen, but Intel is being killed by the v-cache chips. Hopefully, the rumored bLLC will materialize for NL and give them something competitive.
 
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dangerman1337

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Well, the problem for Intel is that gaming performance is the primary metric for a lot of consumer users in the high end segment. And that is dependent on P cores. Actually, P core performance in gaming is not that bad compared to vanilla Zen, but Intel is being killed by the v-cache chips. Hopefully, the rumored bLLC will materialize for NL and give them something competitive.
Thing is AMD if rumoured for Zen 6 and onwards have the ability to potentially stack an additional V-Cache tile so Zen 6 X3D (probably won't happen) could have 240MB of L3 cache with another 96MB tile. Or Zen 7 if 4nm 128MB L3 caches appear go to 320MB of L3 Cache in total (math: 64MB L3 on the tile and 2x128MB cache tiles), and that's not counting potentially doubling L2 cache per core.

Honestly Zen 7 if they could hit the cache targets, core count of 16 and hit 7Ghz even for Zen 7 X3D... damn an absolute monster gaming (or ultra fast with cache friendly workloads) CPU. Maybe one or two of those will give but still crazy to think about it.
 

Timmah!

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Summer is busy for me, I kind of wink out for a bit.

I won't believe 6+GHz until I see it. I mean like actually running on multiple cores on a workload for a few minutes at that speed. Not one cores jumping sporadically up and down. 6GHz has been a speed limit for out-of-the box processors for quite some time. Node jumps are more for area density and power efficiency these days.
I dont tend to pay too much attention in the middle of the product cycles either. I get interested and potentially excited around the time i can actually purchase something new.
 

dangerman1337

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I dont tend to pay too much attention in the middle of the product cycles either. I get interested and potentially excited around the time i can actually purchase something new.
I think the problem this current cycle of GPU & CPUs is so incredibly boring. That's why Zen 6/7, Intel NVL & RZL and RDNA 5 Vs Rubin/RTX 60 is just way more interesting because that's actual things progressing.
 

poke01

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I think the problem this current cycle of GPU & CPUs is so incredibly boring. That's why Zen 6/7, Intel NVL & RZL and RDNA 5 Vs Rubin/RTX 60 is just way more interesting because that's actual things progressing.
I wouldn’t call future Intel CPUs as progressing, more like catching up
 

BorisTheBlade82

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May 1, 2020
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Thing is AMD if rumoured for Zen 6 and onwards have the ability to potentially stack an additional V-Cache tile[...]
Honestly, this is terribly old news. Already from Zen 3 on they were quite vocal that from a technical perspective they could add multiple layers if they wanted. That they did not has less to do with competition and more with diminishing returns. Doubling caches leads to roughly half the misses. Not much wriggle room, if you're already above 80% hitrate for targeted workloads.
 

Thunder 57

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NVL is not out yet all they need is to fix the L3/Fabric the cores will be fine

Is that all? Their L3 has been crap for years so I doubt they magically get it fixed in one generation.

Thing is AMD if rumoured for Zen 6 and onwards have the ability to potentially stack an additional V-Cache tile so Zen 6 X3D (probably won't happen) could have 240MB of L3 cache with another 96MB tile. Or Zen 7 if 4nm 128MB L3 caches appear go to 320MB of L3 Cache in total (math: 64MB L3 on the tile and 2x128MB cache tiles), and that's not counting potentially doubling L2 cache per core.

Honestly Zen 7 if they could hit the cache targets, core count of 16 and hit 7Ghz even for Zen 7 X3D... damn an absolute monster gaming (or ultra fast with cache friendly workloads) CPU. Maybe one or two of those will give but still crazy to think about it.

That is one hell of a wish list. Two stacks of cache and 7GHz :rolleyes: ? I could imagine the marketing though. Zen 7 featuring 7GHz launching 7/7! Also as has been mentioned diminishing returns would likely hit hard.
 
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OneEng2

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I wasn't aware this was a "piss on AMD/but muh Nova Lake!" thread.
I hardly think that anyone is "pissing" on AMD. I think it is unrealistic to expect a 24c Zen 6 to keep up with a 52 core NVL in applications that scale well with the number of cores .... at least on the surface. While it is possible that there will be bandwidth limits, or latency limits, etc, etc. NVL has done a decent job with 24c/24t vs 16c/32t (1.5x more cores) and seems to thrive in CB24 which I am guessing has something to do with bandwidth vs computing power.
On paper, it would suggest that, but that's assuming there's enough bandwidth and power to feed that many cores.

On the AMD side, I see the napkin math as follows:
Venice (N2) is a 70% uplift over Turin-D (N3E) with a 50% core count increase, so the rest (~28%) is from core-on-core uplifts alone (IPC x clocks).

Zen 6 DT gains 50% more cores and a larger node improvement (N4P to N2), so it's not hard to see a doubling of MT performance for Zen 6 DT.
It kinda is hard for me to see a doubling of MT Zen 6 vs Zen 5 DT. Certainly a good jump (at least 50% for certain), but double?

NVL on the other hand literally doubles the number of cores. It isn't difficult at all to believe MT will also double. The mont cores run pretty cool after all.
Don't think it even matters. Not that many people care about multi thread. This thread has all sorts of people excited about multi thread performance for the biggest SKUs while the single ccd version is going to be far and away the biggest most important seller.
Now, this is very likely true; however, perception is very important.

P4 survived an onslaught by AMD simply by pressing the marketing machine on MHz and the blue man group ;). AMD eventually countered with model numbers abstracting the clock speed.

I wonder if Intel will not market cores? "52 Cores! Come one, Come All!!!!". Double the competitions cores!
Summer is busy for me, I kind of wink out for a bit.

I won't believe 6+GHz until I see it. I mean like actually running on multiple cores on a workload for a few minutes at that speed. Not one cores jumping sporadically up and down. 6GHz has been a speed limit for out-of-the box processors for quite some time. Node jumps are more for area density and power efficiency these days.
Me either. I am thinking that AMD is going to use that headroom for a bunch of other things vs clock speed.

Didn't we already witness the downfall of the clock speed race and conclude that efficiency wins?
Which will limited to very small sub block but AMD has been good at extracting perf out of smaller lib why choose bigger if 2-1 gets shit done.
AMD has done a crazy good job of designing a processor that is better than the competition using cost efficient node technology all the way around. I don't think they will change their mode of operation in the next iteration either.
 

poke01

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AMD has done a crazy good job of designing a processor that is better than the competition using cost efficient node technology all the way around. I don't think they will change their mode of operation in the next iteration either
AMD is moving to N2P cause they have too?

N2P is a different beast compared to N3B.
 

Thunder 57

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I hardly think that anyone is "pissing" on AMD. I think it is unrealistic to expect a 24c Zen 6 to keep up with a 52 core NVL in applications that scale well with the number of cores .... at least on the surface. While it is possible that there will be bandwidth limits, or latency limits, etc, etc. NVL has done a decent job with 24c/24t vs 16c/32t (1.5x more cores) and seems to thrive in CB24 which I am guessing has something to do with bandwidth vs computing power.

I was a bit late to the party but if you back a few pages you might just notice it ;) .
 
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Markfw

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I wonder if Intel will not market cores? "52 Cores! Come one, Come All!!!!". Double the competitions cores!
Yes, first I want to see what they actually come up with. 2nd, whatever it is I am sure AMD will counter it with something. I mean 52 cores that will almost blow most power supplies is what I am guessing we will see, if anything at all. 2nd, AMD will have 24 cores with SMT or 48 effective, probably at 200 watts or less. I mean just Zen 5, I have 128 cores with 256 effective at less than 500 watts.

Lets just see what the actual products come up with.
 
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LightningZ71

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Wait, no one wants an asymmetric premium desktop product design?!?! How the heck does AMD justify producing the 9900/9950X3D then?

After Strix Point, AMD proved that there is nothing logical or technical stopping them from having two VERY different CCXs in the same package. They may have to make a unique substrate package that has different traces to support the different CCDs, so it certainly won't be a cheap product, but it's certainly doable.

I dare say that if there's a market for an Intel core processor with 16 P cores and 32 e cores, there also exists a market for an AMD product with a 12 core Zen 6 CCD and a 32 core Zen6c CCD. That market may not make a pick of sense except for bragging rights, and may not support the differential cost of it's products, but it certainly is a market.
 

Markfw

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Wait, no one wants an asymmetric premium desktop product design?!?! How the heck does AMD justify producing the 9900/9950X3D then?

After Strix Point, AMD proved that there is nothing logical or technical stopping them from having two VERY different CCXs in the same package. They may have to make a unique substrate package that has different traces to support the different CCDs, so it certainly won't be a cheap product, but it's certainly doable.

I dare say that if there's a market for an Intel core processor with 16 P cores and 32 e cores, there also exists a market for an AMD product with a 12 core Zen 6 CCD and a 32 core Zen6c CCD. That market may not make a pick of sense except for bragging rights, and may not support the differential cost of it's products, but it certainly is a market.
You seem to thing there is a correlation between Intel E cores and AMD Dense or C cores. Not even close. E core are a serious subset of a P core. was less in total performance. AMD C cores are simply short a little in cache, other than that, they are identical to the regular core, avx-512 included, which I use a lot.

Personally, I have no use for E cores, but any amount of AMD cores is fine, C or regular. I just want a lot of them.
 

OneEng2

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AMD is moving to N2P cause they have too?
Why do you think they have to? They seem to be doing fine on N4P while Intel is on N3B (which is an even better node than N3E aside from cost).
Yes, first I want to see what they actually come up with. 2nd, whatever it is I am sure AMD will counter it with something. I mean 52 cores that will almost blow most power supplies is what I am guessing we will see, if anything at all. 2nd, AMD will have 24 cores with SMT or 48 effective, probably at 200 watts or less. I mean just Zen 5, I have 128 cores with 256 effective at less than 500 watts.

Lets just see what the actual products come up with.
It's an interesting question. How power efficient was an e core on N3B? How much improvement should we expect moving from N3B to N2? Certainly not anything like AMD moving from N4P (an N5 variant) to N2. Still, it wasn't like Skymont cores were sucking power .... but double the cores?

You could be right. That might be an issue.

The real question I have (for both AMD and Intel), is will people really pay premium $$$ to have a mess of cores on the desktop or laptop?

I know you will Mark ;). And for you, the lack of AVX512 is likely a deal killer anyway.

I am just wondering who all those cores are for .... if it isn't a marketing gimic?
 

511

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Yes, first I want to see what they actually come up with. 2nd, whatever it is I am sure AMD will counter it with something. I mean 52 cores that will almost blow most power supplies is what I am guessing we will see, if anything at all. 2nd, AMD will have 24 cores with SMT or 48 effective, probably at 200 watts or less. I mean just Zen 5, I have 128 cores with 256 effective at less than 500 watts.

Lets just see what the actual products come up with.
If vendor put limits on their Mother board it would be fine... also we have E cores in the mix ... 32 of them.
 

poke01

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Why do you think they have to? They seem to be doing fine on N4P while Intel is on N3B (which is an even better node than N3E aside from cost).
N3B isn’t that great of an improvement over N4P
I am just wondering who all those cores are for .... if it isn't a marketing gimic?
52 cores on dual channel memory is a gimmick or rather a marketing play,

Intel can’t win in 1T so they try to win nT which is much easier.
 
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