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dangerman1337
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Jun 22, 2025
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dangerman1337
reacted to
Kepler_L2's post
in the thread
Discussion
RDNA 5 / UDNA (CDNA Next) speculation
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That should be a favourable comparison if anything, DXR 1.2 SER/OMM is supported with SW emulation on RDNA4 while RDNA5 has HW accel...
Jun 22, 2025
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dangerman1337
reacted to
Vikv1918's post
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Discussion
RDNA 5 / UDNA (CDNA Next) speculation
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Does that 2x RT perf use current RDNA4 perf as a baseline? I'm asking because FSR4 Redstone and Direct RT 1.2 will bring some perf boost...
Jun 22, 2025
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dangerman1337
replied to the thread
Discussion
Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]
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Yeah meant to mention SRAM instead of just "density". That's why I can see an Zen CCD on A5 doing 32 Cores w/ 128MB Cache, if Zen 7 is...
Jun 22, 2025
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dangerman1337
reacted to
soresu's post
in the thread
Discussion
RDNA 5 / UDNA (CDNA Next) speculation
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Actually that's pretty par for the course. The first PC APU with RDNA2 (Rembrandt IIRC) was announced in Jan 2022, over a year after...
Jun 21, 2025
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dangerman1337
reacted to
ToTTenTranz's post
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Discussion
RDNA 5 / UDNA (CDNA Next) speculation
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I don't get this. On one side we have leakers claiming AMD's mobile APUs will start watering down their iGPUs because the market isn't...
Jun 21, 2025
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dangerman1337
reacted to
511's post
in the thread
Discussion
Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]
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Like
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It can be both but we will get to know in JULY it's hilarious how kranzich F*** up and the company is not stabilized after 7 years of...
Jun 21, 2025
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dangerman1337
reacted to
Hitman928's post
in the thread
Discussion
Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]
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I think it’s far more likely that the blank check Pat gave to the fabs to build IFS 2.0 has been rescinded after failing to attract any...
Jun 21, 2025
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dangerman1337
reacted to
Doug S's post
in the thread
Discussion
Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]
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They're not saying you don't need high NA eventually, just that it isn't the enabling technology for GAA and especially CFET.
Jun 21, 2025
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dangerman1337
reacted to
Hitman928's post
in the thread
Discussion
Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]
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Like
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Pat had them expand personnel and capex in anticipation of major fab customer wins which never materialized, so now LBT has to shrink...
Jun 21, 2025
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dangerman1337
replied to the thread
Discussion
Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]
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CFET doubling density (Logic, SRAM and maybe I/O as well? GPU Memory bit busses being halved would allow some funky stuff like SoCs on...
Jun 21, 2025
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dangerman1337
replied to the thread
Discussion
Intel Nova Lake in 2026: Discussion Threads
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Wonder what the extra cache SKU is and when it comes out? stacked? Or all in one die (hopefully P Core only, imagine either 16P...
Jun 16, 2025
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dangerman1337
reacted to
Kepler_L2's post
in the thread
Discussion
Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads
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Like
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You can look at Zen2 vs Zen3, both had 32MB L3 but on Zen2 only 16MB were available for each core due to split CCX design.
Jun 14, 2025
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dangerman1337
reacted to
adroc_thurston's post
in the thread
Discussion
Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads
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Like
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You want more cache in general for 1T or gaming, and more cache per core for anything nT. Venice-D goes to 4M L3@core despite a...
Jun 14, 2025
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dangerman1337
replied to the thread
Discussion
Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads
.
Hopefully they do it P Core Only, imagine 12 or more Griffin Cove Cores with RZL-S with all that extra cache and crazy fast DDR5 with...
Jun 14, 2025
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dangerman1337
reacted to
511's post
in the thread
Discussion
Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads
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Like
.
NVL has ~1.5 Node shrink and better cores as well i would not be surprised at 2X MT perf vs 285K.
Jun 14, 2025
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