- Mar 3, 2017
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AMD went for the cheapest way possible as always...
Perhaps they really wanted to ensure perf/watt at the very start of the curve is competitive, so they increased the -C core count. I agree though, I'm confused about the P+E core arrangement too, and I'm really surprised out of the couple interviews with AMD employees we had, no one really asked them about this...Cross-latency isn't problem biggest problem- being different cache domains is main problem. Have really, really wonder why AMD selected that CCX arrangement as it's the worst possible. They could have done 4+4 CCX with addtional 4 core low power CCX to have at least 8-core CCX with enough cache and fast cores for MT scalability. But they choose that - and result seems to be not that great.
I guess we'll only know for sure with the release of Zen 7. It will be a dead giveaway if they revert some of their design choices.Yea, but somehow "the try new things core" got fkced up in good old AMD way.
Yeah, this is like Cortex-X3, massive changes for meh bumps.Not in the sense of being a completely uncompetitive product. It looks like AMD made some odd choices, tried some new tricks, and performance is kind of underwhelming, but it's not meaningfully worse than Zen4 on any axis and is better on some others.
It's cost.Perhaps they really wanted to ensure perf/watt at the very start of the curve is competitive, so they increased the -C core count. I agree though, I'm confused about the P+E core arrangement too, and I'm really surprised out of the couple interviews with AMD employees we had, no one really asked them about this...
I would add that Bulldozer used more power than it's predecessor and nearly twice as much as Sandy Bridge. Zen5 has quite decent power consumption.Not in the sense of being a completely uncompetitive product. It looks like AMD made some odd choices, tried some new tricks, and performance is kind of underwhelming, but it's not meaningfully worse than Zen4 on any axis and is better on some others.
Folks making the Dozer comparison need to remember that Intel was doing 50%+ more iso-clock ST int against it.
I would add that Bulldozer used more power than it's predecessor and nearly twice as much as Sandy Bridge. Zen5 has quite decent power consumption.
Strix Point still beaten by last gen M3 with a smaller battery. There is a reason why AMD made no battery comparisons.Wow, efficiency is better than my expectation, basically on part with X elite.
Couldn't decide which one is bigger disappointment though.
I think the M4 is that mythical core for now. I suspect the M4 Pro/Max will be quite impressive.No. Zen 5 isn’t bulldozer but it’s also not the mythical core that Apple etc will take years to catch up to. That assertion still annoys me.
The 54watt version?Btw I found this… 1207 pts in CB24 multi-core.
1200 is the theoretical max if we take 1000 result from Computerbase at 3.43GHz Allcore. With 5.1 on All 4 normal Cores and 3.7 on All c-cores we land basically exactly at 1200.Btw I found this… 1207 pts in CB24 multi-core (performance mode).
Full gas, see above, with posted clocks by computerbase we can see that everything above 1200 (of course with slight margin of error) is impossible.The 54watt version?
So it is indeed Zen5%.
Reminder: For comparison of core generations, variable clock runs on different laptops are not as informative asRegressing in the GCC subtest after all the accolades about that zero-bubble, 2-branches BPU with 16k L1 BTB... Jesus, this is Bulldozer vibes.
I think I read that Mike Clark said they worked on four different Zen 5 designs?
In addition, z5c-256 (edit: Strix Point) and z5c-512 (Turin-dense) are on different process nodes.z5c-256, z5c-512, z5-256, z5-512
now that's cope, roll the clock back and see what people expected from Z3/Z4.Stages of an AMD Microarchitecture's Hype
- Wild exuberance and extreme optimism toward rumors
- Dismissing of less positive rumors
- Core is announced; looks mid
- AMD must be sandbagging the numbers; the real ones will be higher
- ES numbers leak
- Perf is mid, it must just be because it's an ES
- Core launches and is reviewed; proves to be mid
- Compiler/application optimization will improve it! Anyway, the next one will be amazing!
- Go to step 1
You probably meant unit widths by "datapath", but incidentally, load/store are kept 512bit on the 256bit variants.I am idly wondering if FPU datapath widths is really the only microarchitectural difference between the designs.
now that's cope, roll the clock back and see what people expected from Z3/Z4.
Yes, a rather unique slip.32%
Have you seen Strix???
Just wait till Zen5 launches!! You'll all see!
Must state the obvious obligatory different GPUs, but further than that-- does anyone remember some techtuber/leaker saying they saw something really weird in CP2077 with either Zen 5 or 9700X (dont remember which)? Somebody help me, I cant recall who it was but I distinctly remember it. This could be what they were alluding to.Is the chinese leak for the recall TYPO legit ? Im 13% faster in avg and 54% in minimum fps then that 9700x on 5800x3d in cyberpunk ? If its true then im kinda pissed. View attachment 104072