The clock decrease will come with a much lower voltage with it.
The technical issue with going "32nm SOI/HKMG -> 28nm bulk/HKMG" is not that Idrive will remain flat or go down (because it won't, Idrive assuredly will go up with 28nm over 32nm) but the static and dynamic leakage value
ought to markedly increase with the 28nm non-SOI process over that which AMD is already relying on with the existing 32nm SOI process.
That much must be true unless the existing SOI-implementation in 32nm is so shoddy, so crappy and so un-optimized, that its removal from the process flow results in nary a difference in static or dynamic leakage.
So we must either assume them to be fools for going to the expense of using SOI at 32nm, or assume them to be fools for bothering to pay for taping out chips for 28nm that don't have SOI, because process-technology wise this should result in little more than trading six of one thing for a half dozen of another.
The primary benefit here from such a node transition "32nm SOI/HKMG -> 28nm bulk/HKMG" is AMD and the cost per die. The wafers will certainly yield more dies/wafer because the 28nm xtors will have higher density (smaller die) and without the SOI tax the wafers will only be slightly more expensive than the existing 32nm ones.
So AMD gets to sell chips which cost them much less per chip, but the chips themselves would not be expected to perform any better (nor worse) than today's chips in terms of clockspeeds and power consumption - but there is the opportunity for IPC improvements of course.
(unless 32nm SOI is just so badly borked that 28nm without SOI does actually turn out to still be just that much better...)