What is Richland? AT users vote.

[Gideon]

Maybe one of the reasons to prefer 28nm bulk over 32nm SOI could be the ability to share larger parts of the design with the "Cat" family? E.g. the banked dynamic L2 cache that seems to be eerily similar in Jaguar and Steamroller ?

 

[inf64]

Maybe one of the reasons to prefer 28nm bulk over 32nm SOI could be the ability to share larger parts of the design with the "Cat" family? E.g. the banked dynamic L2 cache that seems to be eerily similar in Jaguar and Steamroller ?

That's a good point . Steamroller is going to have some design choices which are shared with Jaguar family. They are implemented as both performance and power improving techniques( dynamically shared re-sizeable L2 cache with multiple banks that can clock up/down to preserve power and/or improve single threaded execution performance).

 

[Abwx]

the static and dynamic leakage value ought to markedly increase with the 28nm non-SOI process over that which AMD is already relying on with the existing 32nm SOI process.

the chips themselves would not be expected to perform any better (nor worse) than today's chips in terms of clockspeeds and power consumption - but there is the opportunity for IPC improvements of course.

Unlikely since they maintain high frequency as a design feature
while pointing higher efficency for next node iterations.

http://technewspedia.com/the-new-micro-architecture-modular-amd-steamroller/

 

[Idontcare]

Unlikely since they maintain high frequency as a design feature
while pointing higher efficency for next node iterations.

http://technewspedia.com/the-new-micro-architecture-modular-amd-steamroller/

Two problems with your narrative - (1) it does come with an unavoidable clockspeed reduction, and (2) the improved density libraries and layout are specifically not being implemented with steamroller, they are specific to excavator

AMD's Steamroller Detailed: 3rd Generation Bulldozer Core


The tradeoff is peak frequency. These heavily automated designs won’t be able to clock as high as the older hand drawn designs.

AMD believes the sacrifice is worth it however because in power constrained environments (e.g. a notebook) you won’t hit max frequency regardless, and you’ll instead see a 15 - 30% energy reduction per operation. AMD equates this with the power savings you’d get from a full process node improvement.


We won’t see these new libraries and automated designs in Steamroller, but rather its successor in 2014: Excavator.

There is still the possibility that AMD manages to lower power, raise clockspeeds, and makes us all sammich with their 28nm CPUs - it just requires the SOI-based 32nm process to be so horrendously unoptimized that basically anything would be better (including a 28nm bulk-Si process).

I'm not ready just yet to assume the worst of AMD's choice in using SOI with 32nm, but they do have the opportunity to prove otherwise

 

[inf64]

@IDC

I don't know how 28nm will end up but their 32nm SOI is definitely not what AMD had in mind for Bulldozer. Leakage is pretty bad, yields are subpar to 45nm and cost is probably more than what AMD was expecting. 28nm needs to be seriously screwed up in order to be worse than this process node they are on now.

 

[mikk]

AMD confirmed Radeon 2.0 cores which was referred to VLIW4 from them in the past. I'm unsure if Richland is based on 28nm, I voted for 32nm.

 

[Idontcare]

@IDC

I don't know how 28nm will end up but their 32nm SOI is definitely not what AMD had in mind for Bulldozer. Leakage is pretty bad, yields are subpar to 45nm and cost is probably more than what AMD was expecting. 28nm needs to be seriously screwed up in order to be worse than this process node they are on now.

And to be sure, even if it is no better clockspeed or leakage wise, the production costs per chip will be markedly lower because (1) no SOI wafer cost, and (2) higher xtor density means more chips per wafer.

In my mind there is no question it will be good for AMD, and good for AMD's customers, I just think people's expectations need to be dialed waaaay down in terms of power and/or clockspeed benefits that will be brought by the half-node shrink.

...and this is GloFo's 28nm we are talking about, not TSMC's 28nm (which being gate-last integration will also assuredly result in higher drive currents for TSMC than what GloFo is going to get with their gate-first integration).

 

[NostaSeronx]

And to be sure, even if it is no better clockspeed or leakage wise, the production costs per chip will be markedly lower because (1) no SOI wafer cost, and (2) higher xtor density means more chips per wafer.

Bulk is no cheaper than SOI past 32-nm do to physicality.

The issue with finding information for 32-nm and 28-nm is foundries basically list them as the same node. The only information I can find about 32-nm vs 28-nm is only on Networking ASICs:

32-nm: 300 MHz - 600 MHz / 10 Watts - 80 Watts
28-nm: 400 MHz - 900 MHz / 10 Watts - 90 Watts

Then you have information that AMD & GlobalFoundries way back in 2010 made test chips on 32-nm SOI/32-nm Bulk(Samsung)/28-nm Bulk(CP). AMD obviously knows what process to go on since they did testing when they had owned GF still.

A10-5800K 3.8 GHz @ ~1.4 volts <-- 32-nm SHP
A10-6800K 3.2 GHz @ ~1.1-1.2 volts <-- 28-nm LPH

 

[inf64]

A10-5800K 3.8 GHz @ ~1.4 volts <-- 32-nm SHP
A10-6800K 3.2 GHz @ ~1.1-1.2 volts <-- 28-nm LPH

6800K running at 3.2Ghz? Even if it had 35W TDP it would be called a failure in reviews, sorry. No magic pixie dust can bridge 18+% clock deficit. They need faster x86 core in 2013, not slower.

 

[NostaSeronx]

6800K running at 3.2Ghz? Even if it had 35W TDP it would be called a failure in reviews, sorry. No magic pixie dust can bridge 18+% clock deficit. They need faster x86 core in 2013, not slower.

5.2 GHz @ 1.55 volts

You happy now? You are arguing about the stock clock on an unlocked part and that isn't even the final specification. I wonder what AMD is hoping for 28-nm as well as of you all.

(You also have to point out that the A10-6800K has the same TDP nomenclature as the A10-5800K. Everything I can find about 28-nm and 32-nm places 28-nm at much faster and lower leakage than even SOI 32-nm.)

 

[inf64]

5.2 GHz @ 1.55 volts

You happy now? .

Yeah and you typed it on your invisible keyboard I guess?
On a serious note if they opt to call it 6800K it ought to be at least on par with 5800K. Anything else and flaming reviews will be coming their way next year. Remember how Trinity even though actually faster than Llano recieved mixed reviews due to "lower ipc"? Now imagine this thing running ~20% slower in benchmarks. Sorry does not jive.

6800K can actually be option number 1 or 2 in the poll,same 32nm PD based core,similar CPU clock or a small bump(4Ghz instead of 3.8Ghz? not that it will make much difference) and a bit better GPU.

 

[NostaSeronx]

6800K can actually be option number 1 or 2 in the poll,same 32nm PD based core,similar CPU clock or a small bump(4Ghz instead of 3.8Ghz? not that it will make much difference) and a bit better GPU.

The issue with that is that there is no VLIW4 GPUs to crossfire within the 8000 series. All of the 8000 series use Graphic Core Next 2.0 clusters.

Etc.
Richland GPU: 8000 series Graphic Core Next (8400-8600/8500M-8700M)
Kabini GPU: 8000 series Graphic Core Next (8200-8300/8300M-8400M)
Temash GPU: 8000 series Graphic Core Next (8100-8200/8200M-8300M)

 

[inf64]

The issue with that is that there is no VLIW4 GPUs to crossfire with in the 8000 series. All of the 8000 series use Graphic Core Next 2.0 clusters.

Yeah the hybrid CFX was one of important selling points AMD used before. This brings us to following dilemma:
1) AMD was talking about Kaveri in H1 2012, showing it on 2013 roadmaps to partners etc. Suddenly something happens in the middle of 2012(roughly) and Kaveri gets pushed to H1 2014 instead of 2013. Kaveri most definitely has GCN core based GPU and new shared memory architecture AMD specially designed for HSA. This part should be able to do hybrid CFX with newest GCN discrete parts next year,if it actually would launch next year(it won't as we now know).

2) To bridge the problem in 1), AMD must have had some sort of a backup plan. They couldn't just cook up a 28nm chip based on PD and bolted on GCN in 6 months time frame(production candidates for Richland dice are scheduled for December). So either 28nm PD design with GCN(GCN as it would have to do CF with 2013 discrete parts) was done MUCH earlier, at around same time as Kaveri or Richland is not 28nm but 32nm SOI with GCN bolted on. First option is possible but how likely? Would AMD waste time and money on creating two 28nm designs aimed at the same market segment? Sounds very inefficient. Option 2 of it being 32nm Trinity with reworked GPU is more probable but also begs the question: when did AMD actually design this thing? In parallel with Trinity 1.0? Earlier than Kaveri was finished (and eventually pushed to 2014)?

To sum up: most probable scenario that would fit the time frames and product modeling scheme is : 32nm Trinity part that was designed with GCN in mind but was put on hold in 2011(in favor of easier and faster to market VLIW4) and re-activated in early 2012 to fill in for now missing Kaveri.

 

[inf64]

Bump

New info on Richland. Supposedly 40% faster than Trinity (according to AMD?) @ CES.
Link 1
Link 2

AMD provided an early look at its new 2013 accelerated processing units (APU) and announced a new OEM relationship with VIZIO. At an International Consumer Electronics Show (CES) event for press and analysts, AMD demonstrated working silicon of its first system on chip (SoC) APUs, &#8220;Kabini&#8221; and &#8220;Temash&#8221;, both scheduled to ship in the first half of 2013. Demonstrations included a range of leading-edge applications and games on a &#8220;Kabini&#8221;-based ultrathin notebook and a &#8220;Temash&#8221;-based performance tablet and hybrid notebook.
AMD also introduced the new &#8220;Richland&#8221; APU, which is currently shipping to OEMs, which delivers a 40 percent increase in performance over the previous generation of A-Series APUs. &#8220;Richland&#8221; is expected to come bundled with new software for consumers such as gesture and facial recognition to dramatically expand and enhance consumers&#8217; user experiences. The follow-on to &#8220;Richland&#8221; will be the 28nm &#8220;Kaveri&#8221; APU with revolutionary heterogeneous system architecture (HSA) features and is expected to begin shipping to customers in the second half of 2013.
Additionally, AMD announced a new series of discrete graphics processors for performance gaming that is already shipping to customers, the AMD Radeon HD 8000m series. These latest products are reflective of the company&#8217;s strategy to focus on creating differentiated IP leadership through low-power technologies that target the high-growth client markets such as ultrathin, convertible and tablets.
&#8220;With a groundbreaking new APU line-up in 2013, AMD is poised to win in high-growth consumer segments,&#8221; said Lisa Su, senior vice president and general manager, AMD Global Business Units. &#8220;We are developing technologies with end users in mind &#8211; to bring true surround computing and immersive experiences to our everyday lives. It is exciting to bring our leadership APU technologies to market including the industry&#8217;s first x86 quad-core SoC, while building on our leadership in graphics and gaming.&#8221;

 

[Nemesis 1]

Well its outstanding is what it is only 4 piledriver cores Vs 8 on trinity. Unless AMD is tring to say they only have 4 cores now . It has to hurt. intel 4 cores beat AMDs 8 cores . A 40% increase in performance tho they aren't showing bench marks like intel did with conroy . If AMD was 40% faster than present AMD stuff their would Benchmarks at CES.

 

[inf64]

I have no idea what you are talking about,honestly.

 

[Haserath]

That would have to mean new GPU.

 

[NTMBK]

Well its outstanding is what it is only 4 piledriver cores Vs 8 on trinity. Unless AMD is tring to say they only have 4 cores now . It has to hurt. intel 4 cores beat AMDs 8 cores . A 40% increase in performance tho they aren't showing bench marks like intel did with conroy . If AMD was 40% faster than present AMD stuff their would Benchmarks at CES.

Trinity only ever had 4 cores. I think you're thinking of Vishera. Trinity was the APU part.

 

[mikk]

Poll can be closed. Piledriver+VLIW4+32nm confirmed by AMD. Yeah my vote was right.

 

[inf64]

Poll can be closed. Piledriver+VLIW4+32nm confirmed by AMD. Yeah my vote was right.

It will auto-close in a few days. Good pick

 

[tweakboy]

Well Richland is a place far in saudi arabia for rich people,, gl

 

[jones377]

Poll can be closed. Piledriver+VLIW4+32nm confirmed by AMD. Yeah my vote was right.

It's the only option that made sense given how recently it showed up on the roadmaps after SR got delayed. AMD learned from the Brazos 2.0 launch. Even if you don't really have anything new, make it appear all new and shiny anyway. Still, up to 40% more performance (has to be GPU) is very impressive. Some sort of GPU turbo is my guess, combined with higher memory bandwidth, possibly more shaders too.

 

[itsmydamnation]

GPU already had a big turbo, i recon based on time to market from trinity, its nothing other the a major new stepping, maybe a complete new floor plan ( given the automated tools shouldn't take anywhere near as long as it use to) . We haven't seen any AMD manuals updated so its likely from a logical view of the design not a single transistor has changed.

 

[inf64]

It's the only option that made sense given how recently it showed up on the roadmaps after SR got delayed. AMD learned from the Brazos 2.0 launch. Even if you don't really have anything new, make it appear all new and shiny anyway. Still, up to 40% more performance (has to be GPU) is very impressive. Some sort of GPU turbo is my guess, combined with higher memory bandwidth, possibly more shaders too.

If you look at the roadmap AMD gave out at CES yesterday, the "delay" of Kaveri seems like a minor bump now. It was always supposed to launch in Q2 or Q3 2013,now we have it as Q4 probably. So the delay is really a quarter or so. It's coming and important thing is that SR core is not "cancelled" like some reported.
Richland just needs to fill the gap of a few quarters until Kaveri comes. By the look of the PCmark and 3d mark figures they have supplied,in mobile sector it should do well. I have no idea what kind of clocks will 6800K have in desktop variant of Richland(to warrant the higher model number).

 

[Nemesis 1]

The technical issue with going "32nm SOI/HKMG -> 28nm bulk/HKMG" is not that Idrive will remain flat or go down (because it won't, Idrive assuredly will go up with 28nm over 32nm) but the static and dynamic leakage value ought to markedly increase with the 28nm non-SOI process over that which AMD is already relying on with the existing 32nm SOI process.

That much must be true unless the existing SOI-implementation in 32nm is so shoddy, so crappy and so un-optimized, that its removal from the process flow results in nary a difference in static or dynamic leakage.

So we must either assume them to be fools for going to the expense of using SOI at 32nm, or assume them to be fools for bothering to pay for taping out chips for 28nm that don't have SOI, because process-technology wise this should result in little more than trading six of one thing for a half dozen of another.

The primary benefit here from such a node transition "32nm SOI/HKMG -> 28nm bulk/HKMG" is AMD and the cost per die. The wafers will certainly yield more dies/wafer because the 28nm xtors will have higher density (smaller die) and without the SOI tax the wafers will only be slightly more expensive than the existing 32nm ones.

So AMD gets to sell chips which cost them much less per chip, but the chips themselves would not be expected to perform any better (nor worse) than today's chips in terms of clockspeeds and power consumption - but there is the opportunity for IPC improvements of course.

(unless 32nm SOI is just so badly borked that 28nm without SOI does actually turn out to still be just that much better...)

so now that we know whats your take now. I struggling abit today . So I having a hard time with what you wrote . So if you would give your take on what happened here . Thanks