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The Intel Atom Thread

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Gemini Lake Block Diagram

Gemini-Lake-Block-Diagram.jpg


www.cnx-software.com/2017/08/14/intel-gemini-lake-block-diagram-and-yet-more-info
 
Looks like Gemini Lake will support Intel SGX so Netflix 4K streaming support might be a possibility.

Hopefully Mercury Lake 10nm will support DisplayPort 1.4, HDMI 2.1 and fixed function AV1(VP9 successor) hardware decoding.
 
I think Knights Hill has been cancelled.

I thought it hasn't bought I looked more in detail. The main idea that supports cancellation or heavy modification seems to be connected to the news stories about Aurora supercomputer deal. Some seem to suggest they might instead go for a more revolutionary approach, and that Knights Crest seems to fit that category. Knights Crest is a traditional Xeon + Nervana accelerator.* Whether its on-die or off-package I am not sure but surely more integrated than current solutions.

Unless they think of outright cancelling the Xeon Phi line, I assume a replacement for Knights Hill would be in order. I agree with some saying Knights Hill is too delayed to be ever competitive with Nvidia's solutions in the pure perf/watt and performance space. If a replacement is coming next year I'd hope to see a Goldmont Plus core with 50GF/Watt(10TFlop DP @ 200W) at chip level. That's 3x the DP performance and nearly 2x per core performance.

*I do not believe Nervana solutions are competitive with Nvidia ones either. The yet-to-be-released Lake Crest is said to offer 50TOPS tensor performance, while Volta that could be bought today already offers 120. Not only that you need to buy* Knights landing to get regular HPC performance while Volta does it all in one. The technical lead Nvidia has over Intel and the way they execute their plans far outstrip Intel.

*It should be buy, not be. I made a mistake. But the stupid spam filter won't let me change. An example of change that hurts the many because of a stupid and irresponsible few. Another is DRM.
 
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Still using Airmont cores, but nice to see 16C/16T @ 2.0 GHz in a 31W TDP.

Looking forward to some Silvermont/Airmont vs Goldmont vs Goldmont Plus performance per clock comparisons.

Edit: Goldmont instead, interesting.
 
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That's quite awesome.

Doing some rough calculations, if the Goldmont Plus gains translate to these workloads at 30%, and Hyperthreading is responsible for 30%,

That means at per thread level Broadwell cores won't be that much faster. I see anywhere from 0-15% advantage. At that point I think if there's a clock speed advantage they might replace ALL Xeon D cores with Goldmont Plus ones once they get Hyperthreading.
 
That's quite awesome.

Doing some rough calculations, if the Goldmont Plus gains translate to these workloads at 30%, and Hyperthreading is responsible for 30%,

That means at per thread level Broadwell cores won't be that much faster. I see anywhere from 0-15% advantage. At that point I think if there's a clock speed advantage they might replace ALL Xeon D cores with Goldmont Plus ones once they get Hyperthreading.

Yep 🙂

I think the Atom core will do a lot of "growing up" in the coming years and could take the torch from the Core architecture for client-focused workloads.

Similar to how Zen seems to share quite a lot with ol' Jaguar.
 
Yep 🙂

I think the Atom core will do a lot of "growing up" in the coming years and could take the torch from the Core architecture for client-focused workloads.

Similar to how Zen seems to share quite a lot with ol' Jaguar.

There's still quite a gap on Cinebench. It could be that Cinebench is optimized for vector instructions(even though its not for AVX).

I hope that means we'll see bigger Core cores rather that meaning their main chips moving to post-Goldmont cores.
 
Based on Geekbench scores, while Goldmont is behind, it doesn't seem to be doing that terribly. Considering the amount of money thrown at it, I reiterate the possibility of them coming back in the phone space. The one that's really ahead are Apple chips. Android vendors aren't that far ahead. If Goldmont Plus improves Geekbench scores much as Goldmont did over Airmont, they could exceed Snapdragon 835 scores and then some, possibly competitive.

They even said Goldmont was the generation where contra revenue wasn't needed. Mercury Lake with integrated 5G modem for phones? 🙂
 
https://www.intel.com/content/dam/w...t-briefs/dual-band-wireless-ac-9560-brief.pdf

The Intel Wireless-AC 9560 adapter is a CRF (companion RF module) supporting
the 1st generation integrated Intel wireless 802.11ac solution comprised of CNVi
and a CRF. The solution provides Bluetooth 5 and 2x2 802.11ac Wi-Fi including
wave 2 features such as 160MHz channels delivering up to 1.73Gbps
and downlink MU-MIMO.

CRF: Companion RF module in M.2 form factor supporting integrated solution.
CNVi; Refers to the integrated wireless IP portion residing in the SOC/PCH.

CBxWhVI.jpg
 
Nice to see this thread is still going. Now if can go back to calling everything Atom (like in the pre-Bay Trail days) instead some Atom, some Celeron and some Pentium I'll be happy.
 
Nice to see this thread is still going. Now if can go back to calling everything Atom (like in the pre-Bay Trail days) instead some Atom, some Celeron and some Pentium I'll be happy.

Expect this to continue, especially that it will be much easier to just pull in Atom cores into a design once EMIB arrives.

Ideally Intel would just build a single scalable design that could be widened or shortened (for Atom). But that doesn't seem to be happening.
 
So my question is, while it is not an Intel design core and done by a different team, what would AMD Ryzen / Zen chips be?

Ryzen is a medium sized core. Now I would put quotation marks for the word medium because currently there's no core that's bigger than that. You can arguably say Intel cores are bigger, but not significantly.

You misunderstand when I say small/medium/large core. Ryzen is a smaller core than Skylake, because its a narrower core and has lower perf/clock. Skylake can scale lower in power, but that doesn't have anything to do with the architecture.

For example, Skylake has 224 ROBs or Reorder Buffers. That refers to one of its out of order resources. When I say large core I mean a core that has something like 1K(1000+) ROBs. Maybe 8-10 wide. That's just an example, because everything else would have to be expanded to get the appropriate increase in perf/clock.

Of course it could be that we are headed towards a really sad future where the top CPU of 2050 is less than 50% better in perf/clock from current cores.
 
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