Speculation: Ryzen 4000 series/Zen 3

[NostaSeronx]

AMD unequivocally declared the JV dead before a Zen2/7nm equivalent core changed hands.

Hygon is currently working on a huge "7nm/7nm+/6nm" CoWoS/InFo successor to both of these Hygon CPU*1 + Vega20*4 & Hygon CPU*2 + Vega20*1. Which will be with a 7nm Hygon CPU 3rd Gen? and 7nm Hygon GPU 1st Gen?.

Hygon can exist without AMD, they bought TangremTek which did the SEV-hack in 2017 "sev hack demo by tangramtek 2017"
"Continue to lead the secure software department as secure archtect after the department of TangramTek is acquired by HYGON."

"After the embargo was announced, Hygon could no longer obtain AMD's new product architecture license, but this did not affect the authorization already obtained. Hygon has set up a research and development team of more than 500 people, and has the ability to further develop new products and improve CPU performance based on the already obtained authorization. This also means that the CPU of the X86 architecture may have a hard fork in China in the future, and we will part ways from the United States and go out of our way."

Hygon is a rogue x86 manufacturer and they got GCN too! They acquired teams from Samsung CPU/GPU/SoC as well, but I'm not sure how big that info is. They can also port their designs: http://www.umc.com/English/process/a14.asp & https://www.smics.com/en/site/technology_advanced_14 and they have access to TSMC.

 

[soresu]

Hmm... looking at it again, maybe not. But that makes the use of the same codename twice by AMD seem quite suspect.

Possibly a final shrink for XB1 for super duper slim form factor.

Surely at <=7nm it would be able to get extremely small and low power - perhaps something to tide over those unwilling to pony up for the upgraded Scarlett.

 

[uzzi38]

That's what I was thinking, especially in regard to the streaming Xbox rumours from a while back.

But honestly, idk. Could be anything at the moment :/

EDIT:******* phone app. Last time I use that ****.

There is no profanity allowed in the tech forums.
administrator allisolm

 

[yuri69]

Vermeer has been seen on a roadmap as the 2020 desktop successor to Matisse, so unless Vermeer skips Zen3 and goes to Zen4 your statement makes zero sense.

Just wanna point out, AMD has recently released a doc named "Software Optimization Guide for AMD Family 17h Models 30h and Greater Processors".

This means all CPUs labeled as Family 17h Models 30h or greater are Zen2 Rome-based. Ofc, this guide concerns only the *publicly available* CPUs.

Given the Family 18h is already taken by Dhyana, we are left with Family 19h for the Zen3.

 

[NTMBK]

Possibly a final shrink for XB1 for super duper slim form factor.

Surely at <=7nm it would be able to get extremely small and low power - perhaps something to tide over those unwilling to pony up for the upgraded Scarlett.

Give me an Xbox One handheld, with a 128 bit LPDDR4 bus and a 7/5nm APU!

 

[soresu]

Given the Family 18h is already taken by Dhyana, we are left with Family 19h for the Zen3.

I think everyone is getting overly hung up on this 'Family xxh' stuff.

I just separate it by core names and code names - the more complexity you add to that the less sense it all makes and the more room you have for miscommunication.

It's really just getting into the low level nitty gritty of software/firmware/microcode developers at the point of the exact SKU ID's and family differentiations.

 

[soresu]

Give me an Xbox One handheld, with a 128 bit LPDDR4 bus and a 7/5nm APU!

At <=7nm the XB1 SoC should be well below 35W, though I couldn't hazard a guess on even 7nm TDP without knowing the exact power draw of XB1S (16nm?).

 

[Topweasel]

AMD unequivocally declared the JV dead before a Zen2/7nm equivalent core changed hands.

Unequivocally declared it dead is a strong term. They described it as single one time license of their IP to this joint venture and that they never intended to continue to license future IP's (ie Zen 2) to them. The JV is still alive but its not a cross licensing deal.

 

[uzzi38]

At <=7nm the XB1 SoC should be well below 35W, though I couldn't hazard a guess on even 7nm TDP without knowing the exact power draw of XB1S (16nm?).

Why the Xbone X - that has a much larger GPU compared to the base Xbone, and GDDR5 as opposed to DDR3 if memory serves me correctly.

Anyway, here's some power consumption figures for both.

The base Xbone would probably be just fine for a handheld, we're talking about Jaguar cores and a 12 CU GPU. Though... it'd make no sense over Renoir.

The Xbone-X I don't think would fit into a 35W TDP. Which is already too high for a handheld.

 

[soresu]

Why the Xbone X - that has a much larger GPU compared to the base Xbone, and GDDR5 as opposed to DDR3 if memory serves me correctly.

Anyway, here's some power consumption figures for both.

The base Xbone would probably be just fine for a handheld, we're talking about Jaguar cores and a 12 CU GPU. Though... it'd make no sense over Renoir.

The Xbone-X I don't think would fit into a 35W TDP. Which is already too high for a handheld.

Re-read my quote, it says XB1S, not XB1X - I used the S variant because it's closer to 7nm vs the original 28nm SoC.

While the IPC of Zen over Jaguar is an overwhelming advantage, I'm not sure that 4C with SMT would correspond exactly to 8C if you were using Renoir in place of Jaguar for SW compatibility - it would also be significantly larger and consume more power in all probability.

Do we have a Jaguar core area/mm2 at 16nm to compare with closest size Zen1?

 

[soresu]

The base Xbone would probably be just fine for a handheld, we're talking about Jaguar cores and a 12 CU GPU. Though... it'd make no sense over Renoir.

Found a wiki with 16nm Jaguar on it, just no individual component sizes - sadly my area geometry mathematics are a tad rusty, can anyone work out the area of a 4C Jaguar module from this?

I think a 14nm CCX of Zen1 was about 47 mm2 if memory serves.

 

[soresu]

It does pose an interesting question of CCD bandwidth vs Zen2 though if the unification of the L3 cache means only one IF link to the IOD.

Perhaps we can infer an increase in IF link bandwitdh for Zen3 as there was from Zen1 to Zen2.

Is this meant to be a question based on my post a week ago?

Because that is not only word for word, it even uses my spelling mistake on 'bandwitdh' too.

 

[DisEnchantment]

7nm+ Zen 3 makes sense for AMD as the follow up Zen4 has an easier design upgrade path to N5. 7nm DUV will stop with N6. By the time Zen 3 ships, N7+ would have been stable and already ramped up, as reported by AT.

To me Zen 4 sounds like it will be the one to bring bigger uplifts, 45%+ area reduction vs Zen2, N5, DDR5, PCIE5, AM5 (which could bring new socket with more pins). Die stacking sounds like something for Zen5 with 3nm GAA and CoWoS

But Zen 3.
Unified L3
Reduced memory latency ( which could greatly help AMD in games and other latency sensitive applications ) looking at Zen to Zen+ transition.
Faster and more efficient IF. Reduced idle power.
What are they doing with 15%+ area reduction? Cram more L3
Will the uncore or the core part get the extra transistor budget.

Anyone know if the N7P applies to HPC or Soc only?

 

[soresu]

Anyone know if the N7P applies to HPC or Soc only?

AMD has designs on 7nm+ and at least Huawei does too on their Kirin 990 variant.

AM5 (which could bring new socket with more pins)

If DDR5 pin count increases, this is a distinct possibility.

 

[Veradun]

AMD has designs on 7nm+ and at least Huawei does too on their Kirin 990 variant.

If DDR5 pin count increases, this is a distinct possibility.

Pin count is the same on DDR5 as compared to DDR4 IIRC

 

[Thunder 57]

7nm+ Zen 3 makes sense for AMD as the follow up Zen4 has an easier design upgrade path to N5. 7nm DUV will stop with N6. By the time Zen 3 ships, N7+ would have been stable and already ramped up, as reported by AT.

To me Zen 4 sounds like it will be the one to bring bigger uplifts, 45%+ area reduction vs Zen2, N5, DDR5, PCIE5, AM5 (which could bring new socket with more pins). Die stacking sounds like something for Zen5 with 3nm GAA and CoWoS

But Zen 3.
Unified L3
Reduced memory latency ( which could greatly help AMD in games and other latency sensitive applications ) looking at Zen to Zen+ transition.
Faster and more efficient IF. Reduced idle power.
What are they doing with 15%+ area reduction? Cram more L3
Will the uncore or the core part get the extra transistor budget.

Anyone know if the N7P applies to HPC or Soc only?

I've been thinking AM5 will be LGA with more pins. The reason AM4 was PGA (supposedly) was at the request of motherboard manufactures. They don't have that kind of pull this time around.

 

[DisEnchantment]

A more interesting upgrade would be Zen 4 IMO. AMD cannot use the same IOD from Zen3 which is, most likely, largely similar to Zen2 as shown in the slides from UKRI.
They have to solve idle power used by IF which the IOD has a lot of.
I would suppose AMD would have been thinking of countering the Cove Cores, so if they want to have a good chance of fighting back they need some good gains not only in the CCD but also IOD.

I wonder if GF 12LP+ would be a candidate, but with all the rumors and patents of some form of memory stacking it would not surprise me if AMD drops GF at this point in time 2021 time frame.

 

[NostaSeronx]

Anyone know if the N7P applies to HPC or Soc only?

N7P is compatible with both HPC and Mobile. N7 HPC is just larger CPP and tall(7.5T) track libraries, and N7 Mobile is just shorter CPP and short(6T) track libraries. Also, N6 is compatible only with N7/N7P.

Performance increase with N7+ requires a redesign, with N7P not requiring it. N7+ to get the 10%+ perf the new design needs: new HP SRAM + new MIM-CAP + uLVT transistor. While N7P, is just a new FinFET implant and it will always get the 7%+ perf without redesign.

 

[Ajay]

I've been thinking AM5 will be LGA with more pins. The reason AM4 was PGA (supposedly) was at the request of motherboard manufactures. They don't have that kind of pull this time around.

That would be a plus. PGA sucked, IMHO. I was so happy when LGA came along. I got really good at fixing pins, not that I enjoyed it.

 

[Guru]

AMD won't do DDR5 on Zen 4 simply because DDR4 has way more market share and it would be easier for consumers to just use their existing DDR4 with a new Zen 4 processor. I don't think either AMD or Intel would go to DDR5 before 2021.

Also as always new DDR5 ram modules would be more expensive than DDR4 and would stifle Zen 4 adoption rates.

I don't see AMD nor Intel going that route at least until 2021.

 

[NostaSeronx]

On the DDR5, AMD will need to go DDR5 sooner than later or they'll be irrelevant. The next relevant Element cartridge(NUC9) will support U w/ LPDDR5 and H w/ DDR5.

AMD is suffering the good ole gloom and doom again. If they don't progress fast enough they will be swamped by Core2(WLC) and Nehalem(GDC).

 

[Thunder 57]

That would be a plus. PGA sucked, IMHO. I was so happy when LGA came along. I got really good at fixing pins, not that I enjoyed it.

PGA worked will, and somewhat does still. But as the number of pins has gone up, it has become more of a pain in the ass. I also like how Intel notches their CPU's, so it can only go in one way. With the arrow method, I could swear it was supposed to be in the corner with the lever back in socket A days (turns out it was). But with AM4 it is the side opposite the lever. At some point, the corners switched.

My friend got a 2700X for free because it had 40 something bent pins on it. Took a little time I'd imagine, but he got it working. I've had good luck with pins, except once (don't assemble computers intoxicated , or skip reading the manual, as the arrow swapping corners bit me), but I prefer LGA as well.

AMD won't do DDR5 on Zen 4 simply because DDR4 has way more market share and it would be easier for consumers to just use their existing DDR4 with a new Zen 4 processor. I don't think either AMD or Intel would go to DDR5 before 2021.

Also as always new DDR5 ram modules would be more expensive than DDR4 and would stifle Zen 4 adoption rates.

I don't see AMD nor Intel going that route at least until 2021.

They could pull an Intel and be like, hey, we'll sell more chipsets by making people buy a new motherboard. Honestly it is probably just the natural move. Plus marketing might love AM5, DDR5, PCIe5, and make a big deal about the number 5. Just look what they did with 7. What would be nice is if they made different IOD's, one for DDR4, one for DDR5. That's an extra cost for AMD though, then they have to hope they produce the right ratio of both types. For those reasons alone it will never happen.

 

[Veradun]

AMD won't do DDR5 on Zen 4 simply because DDR4 has way more market share and it would be easier for consumers to just use their existing DDR4 with a new Zen 4 processor. I don't think either AMD or Intel would go to DDR5 before 2021.

Also as always new DDR5 ram modules would be more expensive than DDR4 and would stifle Zen 4 adoption rates.

I don't see AMD nor Intel going that route at least until 2021.

It's "just" a matter of IOdie, they can literally adopt DDR5 whenever they want with a IOD update leaving the CCDs untouched

What would be nice is if they made different IOD's, one for DDR4, one for DDR5. That's an extra cost for AMD though, then they have to hope they produce the right ratio of both types. For those reasons alone it will never happen.

Looking at their record is still possible they just double down on controllers on a single IOD SKU to have maximum flexibility and just differentiate at packaging

 

[soresu]

I've been thinking AM5 will be LGA with more pins. The reason AM4 was PGA (supposedly) was at the request of motherboard manufactures. They don't have that kind of pull this time around.

An interesting thought, especially with AMD CPU prices going up, I dont want to pay premium for something that can die from a bent pin.

 

[soresu]

They could pull an Intel and be like, hey, we'll sell more chipsets by making people buy a new motherboard.

Just because they can doesn't mean that they will - Lisa Su knows this is one of Intel's biggest pain points from a PR perspective, it would be stupid to invite the same problem onto their platform and lose the high ground, especially when they are otherwise doing so well.

Give it till the Zen4/Zen5 timeframe - if Intel is not competing well with them you could expect AMD to get cocky and plug the mboard market for all it is worth.