Speculation: Ryzen 4000 series/Zen 3

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Valantar

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Aug 26, 2014
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@Valantar

Q3 is only 2 months from now (July). If B550 launches in July, you think that would be abnormal? Granted, it was supposed to be out in July of LAST year, but we all know why that didn't happen . . .
Isn't it pretty much confirmed at this point that Vermeer is slated for an "end of 2020" release? If that falls within Q3, it definitely isn't July - I would be very surprised even if we saw Vermeer launched in September. AMD's desktop CPU release cadence so far has been a year and a few months, so unless Zen 3 is arriving significantly faster than previous generations it won't be here until fall at the earliest, though late fall or "holiday" is more likely IMO. Thus I would assume desktop Renoir arrives first, possibly alongside (or more likely during the slow trickle out of) B550.
 

DrMrLordX

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Apr 27, 2000
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Isn't it pretty much confirmed at this point that Vermeer is slated for an "end of 2020" release? If that falls within Q3, it definitely isn't July - I would be very surprised even if we saw Vermeer launched in September.
Nothing's really confirmed. AMD is staying pretty quiet. We have seen fewer ESes floating around for Vermeer than we did Matisse. It's all very secretive. I would think September would be more-likely for Vermeer than anything else, but that's just a guess. I could see B550 in July and Vermeer in September.
 

DisEnchantment

Senior member
Mar 3, 2017
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We have seen fewer ESes floating around for Vermeer than we did Matisse
I am not aware of any Zen3 ES let alone Vermeer ES thus far. In Contrast, Zen2 ES were common almost 8 months before launch.
They stated that they have been sampling since Q4 last year. But till now not even a part number anywhere. Nothing.

If they are this quiet it must be very good. Can't imagine otherwise. Looking at the 3100 vs 3300X comparison, just having a unified cache raised "IPC" considerably. Optimize some DRAM latency. Just like that, IPC will improve without touching the core.
From HarwardeNumber3rs testing, increasing frequency does not do much for Zen2, so I guess that was the reason they did not bother much with it. In fact would have been negative PR with higher frequency.
1588956724871.png
I still believe they will be on track for late Q3 this year at the latest just like they stated on their slide from last Nov (Also confirmed from the NERSC PR). Probably earlier for Desktop.
Otherwise it is going to be almost TWO years from tapeout to Launch and one year from sampling to launch. That is nuts. That is way too long.
 
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soresu

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Dec 19, 2014
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@soresu

Hey if they want to launch B550 early let them, I have no problem with that. I don't think they've done that before except with A320 (which launched maybe 6 months before Ryzen).
I was expecting it last year in July when I would have bought it, alas it is most definitely not early at 10 months and counting since then.
 

RetroZombie

Senior member
Nov 5, 2019
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As was said, its about motherboard support. I have a 3900x running on a x370 Taichi, no problem.
I think a friend of mine with one 300 series MSI Tomahawk got from a pretty bios at release and now the newer one according to him is super ugly.

Probably the lack of space and so many cpu gens to support: carrizo, zen1, zen1 apu, zen1+, zen1+ apu, zen2, zen2 apu and soon zen3.
There must be out of space for so many microcode.

One thing they could do is release different bios for each gen, the problem it would be a nightmare for them to manage all, and imagine flashing one with the carrizo support and then wanting to put a zen3 on it without knowing the board have a unsupported bios, and throw it away thinking it's broken?
 

soresu

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Dec 19, 2014
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I agree that it makes some sense, but considering how small the consumer desktop APU market is the impact of allocating a few thousand dice to the desktop would be minimal.
I think they are overdue to make some headway in the NUC/SFF market to be honest - once they are done plying Renoir to laptop OEM's they should switch to putting the thumb tacks on Zotac and co to get the ball rolling.

Yes sir I could definitely live with a Renoir or Cezanne NUC at 8C.
 

Valantar

Golden Member
Aug 26, 2014
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I am not aware of any Zen3 ES let alone Vermeer ES thus far. In Contrast, Zen2 ES were common almost 8 months before launch.
They stated that they have been sampling since Q4 last year. But till now not even a part number anywhere. Nothing.

If they are this quiet it must be very good. Can't imagine otherwise. Looking at the 3100 vs 3300X comparison, just having a unified cache raised "IPC" considerably. Optimize some DRAM latency. Just like that, IPC will improve without touching the core.
From HarwardeNumber3rs testing, increasing frequency does not do much for Zen2, so I guess that was the reason they did not bother much with it. In fact would have been negative PR with higher frequency.
View attachment 20758
I still believe they will be on track for late Q3 this year at the latest just like they stated on their slide from last Nov (Also confirmed from the NERSC PR). Probably earlier for Desktop.
Otherwise it is going to be almost TWO years from tapeout to Launch and one year from sampling to launch. That is nuts. That is way too long.
Wow, even 5-6 quarters from tapeout to mass production is a really long time, especially as mass production (at least for consumer parts) generally starts at least a quarter before launch. That has to mean mass production of the CCDs actually starts earlier but they are taking their time to build up stocks and bin chips while selling desktop chips earlier IMO. Otherwise that lead time is absolutely crazy.

I think they are overdue to make some headway in the NUC/SFF market to be honest - once they are done plying Renoir to laptop OEM's they should switch to putting the thumb tacks on Zotac and co to get the ball rolling.

Yes sir I could definitely live with a Renoir or Cezanne NUC at 8C.
I would love that too - those chips would be perfect for those applications. There was that tweet from Ian Cutress (I think) though about SFF PC OEMs being more or less strong-armed by Intel into having really, really slow development cycles for anything AMD-based (Ryzen 3000 mobile APU nuc-likes first arrived around new years, a full year after the chips launched). Wonder how much meat there is to that accusation. Certainly wouldn't surprise me.
Nothing's really confirmed. AMD is staying pretty quiet. We have seen fewer ESes floating around for Vermeer than we did Matisse. It's all very secretive. I would think September would be more-likely for Vermeer than anything else, but that's just a guess. I could see B550 in July and Vermeer in September.
I agree on that, though I would expect a September launch to mirror last year's with not quite a full lineup and availability stabilizing closer to Christmas. But anyhow, September is too late for desktop Renoir.
 

moinmoin

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Jun 1, 2017
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Wow, even 5-6 quarters from tapeout to mass production is a really long time, especially as mass production (at least for consumer parts) generally starts at least a quarter before launch. That has to mean mass production of the CCDs actually starts earlier but they are taking their time to build up stocks and bin chips while selling desktop chips earlier IMO. Otherwise that lead time is absolutely crazy.
There is a good chance they are taking their sweet time since they want to spend more time on Zen 4 as well as not cannibalize their Zen 2 products too early. One needs to remember that the TTM pressure is based on what AMD years ago projected Intel being capable of launching now, and that turned out to be a constant stream of hot air so that pressure mostly dissipated.
 

Ajay

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Jan 8, 2001
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There is a good chance they are taking their sweet time since they want to spend more time on Zen 4 as well as not cannibalize their Zen 2 products too early. One needs to remember that the TTM pressure is based on what AMD years ago projected Intel being capable of launching now, and that turned out to be a constant stream of hot air so that pressure mostly dissipated.
There's also the issue of getting motherboards up to speed. The COVID related problems in China really killed production - it's pretty hard to continue development when there are no new boards coming out of production (from a firmware perspective). Where are Vermeer CPUs assembled? If China, getting enough ES samples could have been a problem. Anyway, all of this is occurring in a near vacuum of facts. Tech companies are so tight lipped nowadays that I find it a bit frustrating, personally.
 

soresu

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Dec 19, 2014
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though about SFF PC OEMs being more or less strong-armed by Intel into having really, really slow development cycles for anything AMD-based
I'm more inclined to think that Zotac do not even want to produce AMD based products - I believe they merely announce them to make themselves sound less like the obvious Intel/nVidia partisans that they have long since become, hoping that any AMD fans might tire of waiting for an AMD product from them and just buy Intel/nVidia anyway.

I suppose it is a viable business strategy - the only question is why AMD allows them to do it when they are clearly getting little to nothing out of it but buyer frustration.

They should sponsor a new NUC/SFF company to put their products first if the current OEM's won't play ball, I'm sure that with AMD's current resurgent status that such a vendor could stay afloat from AMD based business alone.
 

soresu

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Dec 19, 2014
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Wow, even 5-6 quarters from tapeout to mass production is a really long time, especially as mass production (at least for consumer parts) generally starts at least a quarter before launch.
Not really, the new chiplet strategy meant that one single die was going to be in 3 different product lines (EPYC, TR, Ryzen), so they probably had to be very careful about testing and verification of that CCD + of course the separate IOD's associated with it.
 

inf64

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Mar 11, 2011
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Zen3 looks like a September announcement and October availability. From what I heard the core is much better (15 + IPC, no specifics) and clocks more at the same power brackets. AMD doesn't want to cannibalize their Zen2 sales with early Zen3 announcements or leaks , that is why we have virtually no leaks of Zen3 so far. This is the tightest AMD launch to date.
 

DrMrLordX

Lifer
Apr 27, 2000
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I was expecting it last year in July when I would have bought it, alas it is most definitely not early at 10 months and counting since then.
A lot of people were, but that was dead as of, what, March 2019? We're dealing with a revised release schedule now. "Early" is relative.

@inf64

AMD does look like they've been trying to clear stock on Matisse for months now.

@Valantar

I agree that Vermeer is taking its sweet time to come out! I'm still disappointed in AMD that they couldn't hit a guaranteed July 2020 release schedule. If I have to wait until 2022 to get Zen4, I'm gonna be a bit upset. Just a bit.
 

Ajay

Diamond Member
Jan 8, 2001
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Zen3 looks like a September announcement and October availability. From what I heard the core is much better (15 + IPC, no specifics) and clocks more at the same power brackets. AMD doesn't want to cannibalize their Zen2 sales with early Zen3 announcements or leaks , that is why we have virtually no leaks of Zen3 so far. This is the tightest AMD launch to date.
But aren't these just rumors? Has AMD made any specific claim other than 'in 2020'?
 

DisEnchantment

Senior member
Mar 3, 2017
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Where are Vermeer CPUs assembled?
All of AMD's CPUs are assembled in China by AMD/Tongfu JV. Additionally, they have a subsidiary in Penang, Malaysia.
1589008696540.png
There's also the issue of getting motherboards up to speed. The COVID related problems in China really killed production - it's pretty hard to continue development when there are no new boards coming out of production (from a firmware perspective). Where are Vermeer CPUs assembled? If China, getting enough ES samples could have been a problem. Anyway, all of this is occurring in a near vacuum of facts. Tech companies are so tight lipped nowadays that I find it a bit frustrating, personally.
I think as of now (the situation is fluidic) things are looking better in APAC (South Korea, Japan, China, Taiwan etc) and even our factories in China have also reopened since two weeks ago.
In the Shareholders' meeting, Lisa also said they navigated the supply issue and things are under control.

However, report from ChinaTimes and translated by @kokhua indicated that they are having supply crunch.
Demand exceeds supply for AMD's Rome.
I am sure there is a surge in the interest for EPYC Rome recently. Last couple of weeks, there is a flood of PR announcements from Lenovo, HPE, ASUS, Gigabyte, Supermicro and what not about new EPYC offerings.
Not sure if TSMC can allocate enough wafers to AMD even after said capacity increase in Q3.
In this regard, it will be challenging for AMD to also start stockpiling Zen3, besides the additional console chips ramp up (which according to Phil is going as planned )
 

DrMrLordX

Lifer
Apr 27, 2000
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@DisEnchantment

I don't know how TSMC manages wafer production, but assuming Milan is either N7P or N7+, I wouldn't think that increased demand for Rome would have anything to do with supplies of wafers for Milan chiplets. Console demand might affect Milan, though, assuming they use the same wafers.
 

DisEnchantment

Senior member
Mar 3, 2017
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@DisEnchantment

I don't know how TSMC manages wafer production, but assuming Milan is either N7P or N7+, I wouldn't think that increased demand for Rome would have anything to do with supplies of wafers for Milan chiplets. Console demand might affect Milan, though, assuming they use the same wafers.
According to TSMC, much of the equipment is the same for the 7nm family (N7, N6, N7+, N7P) and the chips are actually produced in the same fabs. (Fab 12, Fab 14 and Fab 15 in Hsinchu Science Park, Tainan Science Park and Central Taiwan Science Park respectively).
Only Fab 18 in Tainan Science Park is more dedicated towards 5nm so for this it should not affect indeed (You can imagine why AMD stuck with 7nm family for the moment). This Fab became online last Quarter and it was designed for significantly more throughput than the earlier gigafabs.
They are building a new Fab dedicated towards 3nm with investment of almost 20 Billion USD. Will come online in late 2022/ early 2023. I suppose the older gigafabs will be upgraded to handle 5nm and beyond.
 

coercitiv

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Jan 24, 2014
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I am sure there is a surge in the interest for EPYC Rome recently. Last couple of weeks, there is a flood of PR announcements from Lenovo, HPE, ASUS, Gigabyte, Supermicro and what not about new EPYC offerings.
One day they're can't sell them fast enough, the next day they can't make them fast enough. Gotta love the industry.
 

maddie

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Jul 18, 2010
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Enthusiast wise, a negative for reassignable common die design?

Die electrical characteristics have improved from early days so more die % wise must be meeting the cut off for Rome. Might AMD prioritize Rome products at the expense of desktop, at least in the short term? We'll see if prices rise a bit.
 

Valantar

Golden Member
Aug 26, 2014
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Not really, the new chiplet strategy meant that one single die was going to be in 3 different product lines (EPYC, TR, Ryzen), so they probably had to be very careful about testing and verification of that CCD + of course the separate IOD's associated with it.
Enterprise and server hardware always goes through extremely intensive testing and verification, so I doubt that changes much between Zen 2 and Zen 3 - they are similar architectures on similar nodes, after all. Also, I don't think AMD can afford to wait a year and a half between taping out a design and starting mass production - the R&D costs at that point would be absolutely astronomical, and with nothing being mass produced, none of that would be recouped until 3-6 months later. Even with Zen 2 sales being very good, that is not the type of lead times you want on your products if you want to avoid financial issues.
 

DisEnchantment

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Just a small aggregation of Zen 3 tidbits

1. SEV-SNP instructions added. One more step in complete VM isolation from host.
Kernel patches ongoing. SEV is complete, but SNP still ongoing. MS implemented Autarky recently for Azure on Intel hosts but I think AMD's SEV-SNP is a much more comprehensive solution.
IMO, once the live migration process from encrypted VMs is streamlined it should be easy to deploy widely. Another one is pinning of pages. An improvement would be the HW allow paging in and out encryped pages without too much perf loss.

2. MPK/PKE support added to Programming Manual and kernel patches submitted
Another feature for Memory page protection.

3. PCID support patches submitted
Smaller hits from all those TLB flushes due to security issues.

4. 256 bit CLMUL and AES instructions
One of the things that servers do ALL THE TIME is bulk encryption and bulk compression, which, not coincidentally, Zen2 is strong. Content compression is when the server send your browser compressed data and your browser decodes it on the fly. It is one of the reasons massive web content is not choking the internet. Encryption is as you know, HTTPS traffic which needs no introduction Any Infrastructure guy worth his salt is not going to use SPEC to judge system performance.
256 bit CLMUL and AES operations are going to give decent boosts for servers in bulk encryption and content compression.

Another thing servers do a lot is load balancing and isolating the DMZ, that is routing ip packets from outside to multiple instances of worker nodes. You would be surprised to know how much time a packet spend traversing the networking stack passing through the various chains of the kernel. I know other stacks handle it differently. But for Linux it will go through the various netfilter chains, the iptable chains input, output, forward, nat, and ebtable chains input, output, bridge etc..
AVX instructions are used to speed up this operation by several factors than what could be possible with normal instructions. Topic for another day though (like in memory DBs etc).

Outside of these, there were several new additions and instructions involving TLBs and cache handling to address security issues.
AMD's programming manual got a lot of changes recently! All in all there are more changes for Zen3 than there were for Zen2.
 

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