Speculation: Ryzen 3000 series

[DrMrLordX]

Maybe I need to hit the web again for data on FinFETs. I remember we had a lot of discussions here when Intel first came out with Ivy Bridge.

It would be interesting to see what you find. The days of high-leakage FX chips are long gone, in any case. No more 9590s.

 

[Abwx]

It would be interesting to see what you find. The days of high-leakage FX chips are long gone, in any case. No more 9590s.

FX is almost out of production, all remaining silicon is labeled 4300/6300/8350 for inventory simplification...

https://www.mindfactory.de/Hardware/Prozessoren+(CPU)/AMD+Desktop/Sockel+AM3plus.html

 

[Fanatical Meat]

FX is almost out of production, all remaining silicon is labeled 4300/6300/8350 for inventory simplification...

https://www.mindfactory.de/Hardware/Prozessoren+(CPU)/AMD+Desktop/Sockel+AM3plus.html

Good!

Biggest mistake I ever made in tech was building an FX6300 system for my wife. Should have spent the extra $100 for a proper i3 system and avoid the numerous hardware failures and 3 years of headaches.

 

[Abwx]

Good!

Biggest mistake I ever made in tech was building an FX6300 system for my wife. Should have spent the extra $100 for a proper i3 system and avoid the numerous hardware failures and 3 years of headaches.

Should have spent the extra 100$ (or less..) in picking a 8350, that would have been much more future proof than any i3, and even i5s for multitasking...

 

[Fanatical Meat]

Should have spent the extra 100$ (or less..) in picking a 8350, that would have been much more future proof than any i3, and even i5s for multitasking...

its a Facebook machine.....

From experience my opinion on those chips & motherboards will not change, cheap crap that frequently failed.

What I did do after 3 years of problems was junk the machine and buy a refurb dell i3 machine that has been working without any issues. Plus the dell machine is smaller, quieter and uses around 1/3rd the power.

 

[ozzy702]

Should have spent the extra 100$ (or less..) in picking a 8350, that would have been much more future proof than any i3, and even i5s for multitasking...

They're irredeemable dogs. An i3 would have been a better option, especially since there's a cheap upgrade path down the line. An 8350 has no upgrade path and still feels slower than an i3 in most use cases.

 

[Asterox]

Zen 2 dies 70% yields, or is expected that for first run on 7nm yields are lower.

70% is also good, compared to the original Ryzen 14nm chips with 80+ yields.

https://www.bitsandchips.it/english-news/11566-zen2-yelds-not-fantastic-as-zeppelin-but-very-good

 

[Abwx]

Zen 2 dies 70% yields, or is expected that for first run on 7nm yields are lower.

70% is also good, compared to the original Ryzen 14nm chips with 80+ yields.

https://www.bitsandchips.it/english-news/11566-zen2-yelds-not-fantastic-as-zeppelin-but-very-good

They can offset the thing with 2 x 6C SKUs at good prices for everyone...

 

[maddie]

They can offset the thing with 2 x 6C SKUs at good prices for everyone...

And 1 x 6C. The chance of only getting 4C working will be minuscule. We might really see the R3 as a 6C product.

 

[Kedas]

The important part is in the article: a Ryzen 3000 16core also has a yield of 70%
(ignoring a little loss due to assembly)

Pretty sure intels 16 core on 10nm will not be anywhere close to that on Ryzen 3000 7nm launch

 

[AtenRa]

Good!

Biggest mistake I ever made in tech was building an FX6300 system for my wife. Should have spent the extra $100 for a proper i3 system and avoid the numerous hardware failures and 3 years of headaches.

I still have a FX8150 system currently OC to 4.2GHz (used to have it OC at 4.6GHz), no problems since 2011.

But for your wife an APU would be much better.

 

[Abwx]

And 1 x 6C. The chance of only getting 4C working will be minuscule. We might really see the R3 as a 6C product.

The I/O die is not well amortized with only a 6C chiplet, they could ask 200$ street price for the 2 devices or 400-450$ for one I/O + 2 x 6C chiplets, a much more profitable option

 

[krumme]

The I/O die is not well amortized with only a 6C chiplet, they could ask 200$ street price for the 2 devices or 400-450$ for one I/O + 2 x 6C chiplets, a much more profitable option

Imo It's not about amortization for amd but maximizing revenue from all the segments for total revenue. I think production cost comes way down and plays only a minor role. Amd is not the large player so they take market from Intel. Intel have to have a much sharper eye on margins as they are kind of alone. Besides amd have a wsa to fulfill. The IO does that.
Sure selling a 12c is preferable to 2x 6c but my point is they will just go for it all. It's different consumers and segments.

 

[Tuna-Fish]

And 1 x 6C. The chance of only getting 4C working will be minuscule. We might really see the R3 as a 6C product.

Assuming the same rules as with Zen1, if a chip has faults in two cores in the same CCX, it can only be used as a 4C one, because every CCX on chip must have the same amount of cores active. (Then you get to choose whether you want 2x2C or disable one CCX entirely and go with 1x4C).

While the odds of that will be low, they will not be that low. I think there will be plenty of 4C low-end chips.

 

[maddie]

Assuming the same rules as with Zen1, if a chip has faults in two cores in the same CCX, it can only be used as a 4C one, because every CCX on chip must have the same amount of cores active. (Then you get to choose whether you want 2x2C or disable one CCX entirely and go with 1x4C).

While the odds of that will be low, they will not be that low. I think there will be plenty of 4C low-end chips.

As a percentage? As market penetration increase, they might be reserved for Pro models assigned to business PCs. For the retail market, a 6C could be the real base model. Also, we don't know for sure, if the same limitations exist to utilizing cores in the chiplet.

 

[Mopetar]

Low core-count chips aren't necessarily worthless. Those'll be used for sever chips for people who want a chip with few, but high-clocked cores and a lot of PCI-E lanes.

 

[cortexa99]

https://www.tomshardware.com/news/amd-ryzen-3-3200g-picasso-apu,39120.html

hmmm I think this should belong to 'Ryzen 3000 series' discussion right? Zen+ APU finally surface.

 

[DownTheSky]

Found this @ Beyond3d: https://forum.beyond3d.com/posts/2066217/

 

[amd6502]

https://www.tomshardware.com/news/amd-ryzen-3-3200g-picasso-apu,39120.html

hmmm I think this should belong to 'Ryzen 3000 series' discussion right? Zen+ APU finally surface.

I am really crossing my thumbs that 3300g will be an SMT enabled modestly clocked equivalent, and that it's more closely priced to the 3200g than the 2400g.

Found this @ Beyond3d: https://forum.beyond3d.com/posts/2066217/


View attachment 5436

That sounds interesting. Could they be running one CCX with SMT disabled (4 "big" threads) while leaving the other with SMT (8 "medium" threads)?

The other variation I could think of is asymmetricMT (aSMT: 8 "big" threads along with 8 "small" threads)

Low core-count chips aren't necessarily worthless. Those'll be used for sever chips for people who want a chip with few, but high-clocked cores and a lot of PCI-E lanes.

Why not then just buy a lower end Epyc first or second generation?

 

[maddie]

I am really crossing my thumbs that 3300g will be an SMT enabled modestly clocked equivalent, and that it's more closely priced to the 3200g than the 2400g.



That sounds interesting. Could they be running one CCX with SMT disabled (4 "big" threads) while leaving the other with SMT (8 "medium" threads)?

The other variation I could think of is asymmetricMT (aSMT: 8 "big" threads along with 8 "small" threads)



Why not then just buy a lower end Epyc first or second generation?

Soft Machines derived work?

AMD was a big partner before Intel bought the company.

https://www.anandtech.com/show/10025/examining-soft-machines-architecture-visc-ipc

edit:
Rereading the article makes me wonder if this is finally an application of the Soft machines concepts. A HyperScheduler certainly sounds like this and certain other sources have dropped hints recently that this might be as close as Zen3. When Zen first came out, some of us here predicted a wild ride ahead.

This would imply a bigger impact than just an 8C/16T CPU.

 

[Topweasel]

Why not then just buy a lower end Epyc first or second generation?

Wouldn't that be easy to see. PCIe 4.0 for one. Better memory management with the IO die for another. Higher clocks a 16c 4 chiplet or an 32c 8 chiplet (though I would question this one's existence) would clock higher for 2 reasons, better process, and less power usage. A 16c all core turbo 3.7 GHz Epyc with 8 memory channels and 128 PCIe 4.0 lanes would have some workloads drooling, ones that charge per core.

 

[darkswordsman17]

Found this @ Beyond3d: https://forum.beyond3d.com/posts/2066217/


View attachment 5436

Hmm, is this the mythical "reverse hyperthreading" that's been touted? That really makes me worry, as wasn't that (some majorly new updated scheduler, which of course necessitated a new compiler) supposed to have happened with the construction cores (and was supposed to turn them into monsters)? And then of course never did and all we ended up getting was AMD complaining that Intel's compiler was being used by default for benchmarks.

Or is this expanding to more than 2 threads per core? I recall some people discussing that as an avenue for Zen development, but not sure if there was anything to it other than just speculation.

I'm not surprised at all about the eDRAM or that it'd likely be in the I/O chip. Based on the Sony news, I have a hunch that the I/O might be pulling double duty as the NAND controller and/or have the GDDR6 memory controllers, where they'd use the system memory as the buffer memory for the NAND that will be like 64-128GB embedded onboard. Which, I'd guess they'll keep the GDDR6 memory controllers on probably the Navi GPU die, which would likely increase latency especially for CPU tasks, and so they'd need to figure out a way of dealing with the latency there.

 

[amd6502]

Wouldn't that be easy to see. PCIe 4.0 for one. Better memory management with the IO die for another. Higher clocks a 16c 4 chiplet or an 32c 8 chiplet (though I would question this one's existence) would clock higher for 2 reasons, better process, and less power usage. A 16c all core turbo 3.7 GHz Epyc with 8 memory channels and 128 PCIe 4.0 lanes would have some workloads drooling, ones that charge per core.

Better to go with single or dual chiplet Epyc products.

Theatripper is another option. (do they have a lower cTDP setting??)

I really think quad salvage will exist just because of the sheer number of chiplets in production (my guess actually, in both 2+2 balanced and single ccx 4+0 configurations). Tiny * massively huge is still a pretty big number.

My guess is these will mostly be used for Ryzen 5 4c/8t. (The very few quad chiplets that don't cut the frequencies will be rare and saved for niche Epyc GPU compute APUs for release 2020 or after.)

Here is a hypothetical (rough guess) desktop portion of the product line:

3200g 3.6-3.9 4c/4t 8CU ryzen 3
3300g 3.4-3.8 4c/8t 8CU ryzen 3
3400g 3.8-4.1 4c/8t 11CU ryzen 5
3500 4.0-4.3 4c/8t 7nm ryzen 5
3500x 4.2-4.5 4c/8t 7nm ryzen 5
3565 3.5-4.0 6c/12t 0CU ryzen 5
3585 3.0-4.0 8c/16t 0CU ryzen 7
3600 4.0-4.5 6c/12t 7nm ryzen 7
3700 4.3-4.7 6c/12t 7nm ryzen 7
3800 4.1-4.7 8c/16t 7nm ryzen 7
3800x 4.4-4.8 8c/16t 7nm ryzen 7
3920x 4.2-4.8 12c/24t 7nm ryzen 9 (paper launch)

(7nm probably will also come with zero graphics CU, but nothing has been ruled out at this point).

 

[inf64]

https://www.reddit.com/r/Amd/comments/al5nou

We had ^^ leak 2 months ago. Hyper scheduler with specific modes enabled on 8 core chip (in a console dev kit- supposedly). Interestingly it shows 24 thread mode with Hyper Scheduler enabled.

 

[StinkyPinky]

If this CPU is getting launched in a couple of months, surely we be expecting some pretty constant leaks from this point on? Must be quite a few of them in the wild at this point.