New Zen microarchitecture details

[The Stilt]

Still, I doubt AMD would move forward with 14nm LPP if they thought it would result in such a low clocked CPU.

And what (real) alternatives they had, besides the 14nm LPP? If they would have swapped the manufacturing around prior Zen / Polaris (i.e APU/CPUs to TSMC and dGPU ASICs to GlobalFoundries) I don't know if they would have been able to meet the WSA requirements.

 

[Doom2pro]

Why there is no chance for A0 being the final stepping? The most recent design from AMD launched with A0 revision too (Stoney Ridge).

Was Stoney Ridge a from scratch architecture fabbed on a virgin node? LOL

 

[Arachnotronic]

Still, I doubt AMD would move forward with 14nm LPP if they thought it would result in such a low clocked CPU. Gaining ~50-60% performance while losing 40~50% of your clock speed is not a good trade.

Two words: power efficiency.

 

[The Stilt]

Was Stoney Ridge a from scratch architecture fabbed on a virgin node? LOL

Who said stepping A0 is the first silicon iteration?

 

[Doom2pro]

Who said stepping A0 is the first silicon iteration?

Not me, clearly I'm just pointing out that a new from scratch architecture fabbed on a virgin node is not the same thing as a finely tuned, older architecture, fabbed on an older, refined node.

You asked the question, not me... I can't help if you didn't like the answer

 

[looncraz]

And what (real) alternatives they had, besides the 14nm LPP? If they would have swapped the manufacturing around prior Zen / Polaris (i.e APU/CPUs to TSMC and dGPU ASICs to GlobalFoundries) I don't know if they would have been able to meet the WSA requirements.

TSMC's 16FF would have been a real option with few downsides.

 

[superstition]

If the numbers are right, Zen will be a dismal failure

Technologically, Zen can't be a dismal failure. If it is then there is no reason to release it at all. It would make more sense to delay it until improvements are made instead of having another Bulldozer-style PR problem. Abandoning CMT in favor of a more Intel-like design also seems to point to a conservative design approach that makes it hard to imagine a dismal failure happening, even if the result is not as innovative as some might like.

So, Zen will be a good product. The question comes down to how long everyone will need to wait for it. The other question is how narrowly-focused will it be in terms of being a good product. Ideally, of course AMD would have a product that it can gain marketshare with in multiple spaces, like servers and the desktop — rather than a product that's competitive in fewer.

 

[looncraz]

Technologically, Zen can't be a dismal failure. If it is then there is no reason to release it at all. It would make more sense to delay it until improvements are made instead of having another Bulldozer-style PR problem. Abandoning CMT in favor of a more Intel-like design also seems to point to a conservative design approach that makes it hard to imagine a dismal failure happening, even if the result is not as innovative as some might like.

So, Zen will be a good product. The question comes down to how long everyone will need to wait for it. The other question is how narrowly-focused will it be in terms of being a good product. Ideally, of course AMD would have a product that it can gain marketshare with in multiple spaces, like servers and the desktop — rather than a product that's competitive in fewer.

It will be a great server product - of that I have no doubt. I would not be surprised to learn that the clock speeds discussed are purely for server SKUs and don't relate to desktop parts at all.

All that is needed to completely change the discussion is single-core turbo clocks close to 4Ghz. I somehow doubt Zen will be unable to reach 4Ghz with only one core being loaded, but all of the other cores' power usage will climb, even without being used, which may well be what is limiting the stock clocks - just a TDP limit.

I don't care if I am pulling 200W through an 8-core CPU if I can hit 4Ghz with Sandy Bridge or better IPC... and I also don't care if I have to overclock to reach those clocks :biggrin::thumbsup:

 

[Doom2pro]

but all of the other cores' power usage will climb, even without being used, which may well be what is limiting the stock clocks - just a TDP limit.

I don't recall, but is it known if Zen is going to boost a single core only or is it for all cores?

 

[The Stilt]

I don't recall, but is it known if Zen is going to boost a single core only or is it for all cores?

On previous designs AMD had various turbo levels. The highest ones only available when a certain number of cores are in C6 state, and the lower ones regardless of the active cores. The activation of the lower states obviously requires that the power consumption is within the TDP limit.

That's the case with all 15h and 16h designs. Since Zen's power management should be quite close to Carrizo's / Bristol Ridge's I don't expect that there are major differences in this aspect either.

So basically there would be a guaranteed base clock (P0), a lower turbo clock available when all cores are active (Pb1, and TDP allows using it) and then a separate, higher single core turbo (Pb0).

The figures posted by "AMD Polaris" match with this pattern.

 

[looncraz]

Hmm.. a consideration:

Zen ES is at the moment in revision A0 - it might not be a suprise.

[...]

4 variants of ES Zen are available at the moment:

[...]


The 4c/65W part's clock is the same. (I would expect 3.5GHz base clock for a retail 4c/95W variant.)

Not sure why I didn't immediately consider this... these are engineering sample clocks... so these are actually quite good decent for A0 engineering samples.

3.5Ghz base clock for a 4C variant could have 3.7~4Ghz max turbo clocks, which would suggest 4.2GHz overclocks are doable, if not a bit more. This would be quite good.

 

[krumme]

Stop dreaming ffs.

The wsa is in effect to 2024. Mubadala is effectively bank of amd. Gf it is no matter what.

This process is just super fine for server, consoles, mobile.

How damn lucky is that! Good density. Low cost. Freq match profitable market.

Had this gf process been tuned for higher freq it wouldnt have neither the efficiency at needed freq, secondly it would probably be far more expensive and result in bigger dies at the same time. Third it would not match Intels finest anyway. A total disaster.

As it seems to me amd realistically have a chance to move this big die into consoles within a few years. Its a requirement.

Its absoluty fit for quad notebooks with good gpu. Looks like a win to me. Far far more important than desktop. A quad mobile with base 2 turbo 2.5 and 512 whatever shaders would be a really nice mainstream product.

For servers at the market zen targets efficiency is key. And its here we need info. Its a make or brake. No matter freq or ipc if eff is only halfway to Intel its dead. And even minus 20% is critical as lower cost will not be able to offset tco.

 

[SAAA]

4 core, 65W with the same speed of an 8 core 95W TDP sounds pretty much as ES artificial limitation, not a process/power one.
It should have at least 3.2/3.4 base at that power even with quadratic scaling, while a 95W quad core should be closer to 3.8-4.0GHz speeds.

Haswell:
8 core 140W TDP →3GHz base (5960K)
4 core 84 to 88W TDP →3.6 to 4GHz base (4770K and 4790K)

If 22nm Intel's can do that it's hard for 14nm finfets to be much worst, unless they pushed the process for high density and lower cost.
That or Zen has some design issue that limits high clocks, which I doubt if their target was around 4GHz (unlike Bulldozer's ~5GHz).

 

[inf64]

I guess that AMD could make additional 15% bump over those first ES clocks for 8C parts. If they manage 3.2 base 3.7Ghz ST turbo clocks on it they should be fine.

I just went thru the numbers from recent AT's Carrizo generational review article and it seems that it is around 18% faster than Piledriver, even with that crippled L2 config. Factor in the pure ST IPC jump with Zen and SMT effect (minus the CMT scaling that construction cores have) and one can arrive at +- 5% of Haswell-E numbers at around the same (Haswell-E) clocks in vast majority of those AT benchmarks.

Price it 20-30% lower than intel parts and you have a solid product.

 

[Insert_Nickname]

I just went thru the numbers from recent AT's Carrizo generational review article and it seems that it is around 18% faster than Piledriver, even with that crippled L2 config. Factor in the pure ST IPC jump with Zen and SMT effect (minus the CMT scaling that construction cores have) and one can arrive at +- 5% of Haswell-E numbers at around the same (Haswell-E) clocks in vast majority of those AT benchmarks.

Only other desktop 8 core options (-Xeons) are the 5960X and 6900K. If +-5% Haswell-E core performance is the case, I'll definitely take a good long look at Zen for my next desktop upgrade. Both the others are, well, not really out of the question, but a little more then I'm looking to spend.

 

[stuff_me_good]

Granted as a gaming PC enthusiast this is not looking good for me as I was hoping upgrade to ZEN, but as of now, it seems that there will not be upgrade to anyone with OC 4770K or above user.

But I just don't understand why everybody is so negative towards this? It's not like that ZEN is not good at anything because as of now, it will probably not be viable upgrade path for you. Surely there will be some market for MOAR corez with good power efficiency? Rendering? Encoding? Servers?

Besides, AMD is on dire need for high single core IPC product, when you can probably make the changes later for it to get higher clocks even though it will initially be a pretty bleak for your preferences.

Think about consoles, without ZEN there won't be any AMD consoles after NEO and scorpio, but now because of ZEN, AMD has basically secured it's position for the next gen of consoles too. Maybe ARM could have had some change against PUMA cores in the future, but nothing against ZEN at ivy IPC.

Do any of you remember palomino vs throughbred-b core? Not sure was that massive jump in clocks only because the move from 180nm process to 130nm process, but that sure was massive change. Palomino was super hot and clocked low, but with throughbred you got 800-1000MHz more clocks easily. I guess the designs today are so much complex and the process cahange not so massive, that is not possible?

 

[sweetusernames]

Granted as a gaming PC enthusiast this is not looking good for me as I was hoping upgrade to ZEN, but as of now, it seems that there will not be upgrade to anyone with OC 4770K or above user.

But I just don't understand why everybody is so negative towards this? It's not like that ZEN is not good at anything because as of now, it will probably not be viable upgrade path for you. Surely there will be some market for MOAR corez with good power efficiency? Rendering? Encoding? Servers?

Besides, AMD is on dire need for high single core IPC product, when you can probably make the changes later for it to get higher clocks even though it will initially be a pretty bleak for your preferences.

Think about consoles, without ZEN there won't be any AMD consoles after NEO and scorpio, but now because of ZEN, AMD has basically secured it's position for the next gen of consoles too. Maybe ARM could have had some change against PUMA cores in the future, but nothing against ZEN at ivy IPC.

Do any of you remember palomino vs throughbred-b core? Not sure was that massive jump in clocks only because the move from 180nm process to 130nm process, but that sure was massive change. Palomino was super hot and clocked low, but with throughbred you got 800-1000MHz more clocks easily. I guess the designs today are so much complex and the process change not so massive, that is not possible?

Yeah I'm mostly interested in Zen as an upgrade for me to do video editing and encoding. A 8c/95w part at 2.8 GHz base seems very enticing if it can beat Intel 4c parts in multithreaded and the price is right.

 

[Dresdenboy]

That's based on driver / bios EVV model data, the same code which calculates the correct default voltage for the ASIC, based on leakage.

Those value represent default voltage vs. frequency of a ASIC with medium leakage characteristic.

Shows pretty clearly the point where it starts going south. Ideally Ellesmere (Polaris 10) would not operate faster than ~1000MHz. I'd expect this was the frequency range originally (prior Pascal release) planned.

Nice chart! Seeing it that clearly, I think that AMD might have switched the std cell libs, going for more density maybe. I'll have a look at that later today. We have the Polaris die schematic and earlier GPU die shots to get the area of a CU.

Do you think the Polaris values already contain any AVFS, voltage threshold adaptions?

 

[DrMrLordX]

And what (real) alternatives they had, besides the 14nm LPP?

Given what people have been saying about cost-per-transistor for sub-20nm processes . . . IBM's 22nm FDSOI. Expensive? Sure, in 2013 when it was still in development/testing. Today? Not really.

And it would have been a lot easier for them to transition to that node since they eventually bought out IBM's fabs and engineers.

That being said, it's not clear that they would have done any better than POWER8 in the server/workstation market with such a product. POWER8 is already old hat. Using that old(er) node probably could have accelerated development though. But us desktop enthusiasts probably would have loved what they potentially could have done with it.

TSMC's 16FF would have been a real option with few downsides.

WSA? I don't think AMD could have adopted that for any significant majority of their products, unless GF licensed the process from TSMC. That would have been . . . weird.

 

[The Stilt]

Do you think the Polaris values already contain any AVFS, voltage threshold adaptions?

AVFS and some of the "reliability" are separate values. Basically the driver can speficy their limits for each clock state separately. Some states (idle / low power mostly) can have AVFS / clock stretchers disabled. Extremely complex stuff D: Need to look through the recently updated Linux kernel headers, however I doubt that I'm able to figure much without being able to cross reference and test on the actual card.

Tonga and Fiji have all of the advanced stuff always disabled. I think Polaris is the first one that actually uses AVFS and clock stretchers outside the paper.

 

[looncraz]

WSA? I don't think AMD could have adopted that for any significant majority of their products, unless GF licensed the process from TSMC. That would have been . . . weird.

I think they could satisfy the agreement with GloFo by using them for all of their GPUs - particularly considering they are apparently shifting consoles onto 14nm LPP as well.

AMD has to have two 14nm LPP foundry partners already, it seems, to satisfy their future volume needs. Choosing TSMC, with whom they have worked previously, to make their CPUs on a notably superior process would have been a seemingly easy choice.

I just think 14nm LPP isn't bad, I think AMD's GPUs are simply dense products using dense libraries and have little to no architectural improvements intended for higher clock-speeds. Polaris 10, after-all, is a scaled-up mobile product that was designed for low power, low clocks, and high density.

Zen is a very different type of product. Low power is certainly a feature, but low clocks and maximum density does not seem to be an important factor. Zen probably won't be using the same libraries for the process.

 

[looncraz]

I just got to thinking... RX480 has also been found to be rather highly overvolted from the factory... The BIOS-derived curve is showing worse performance than the real-world curve.

http://www.legitreviews.com/amd-radeon-rx-480-undervolting-performance_183699

1.05V seems to be rather normal to support 1.266GHz, and it draws notably less power with small decreases (though the turbo boost clocks make up for that ). Many have found that they can run 1.3Ghz+ at 1.05V.

Considering 28nm GPUs which are closely related (Hawaii, Tonga, Fiji) are unable to scratch 1.3Ghz at nearly any voltage seems like a good showing for an 14nm LPP product based on a mobile design.

 

[Doom2pro]

Considering 28nm GPUs which are closely related (Hawaii, Tonga, Fiji) are unable to scratch 1.3Ghz at nearly any voltage seems like a good showing for an 14nm LPP product based on a mobile design.

Thank you, that is a very good point... I can't wait for ACTUAL ES leaks to shut up the nay sayers... At least Anandtech forums doesn't have a Juanrga spewing nonsense.

Though I assume Semiaccurate keeps him around just for laughs. Every day gets closer to the purported released of HEDT Zen, and for actual real information rather than rumor. It can't come soon enough!

 

[The Stilt]

I think I've actually overlooked something. I've previously talked how Zen has more precise frequency control than the past AMD CPU designs. Everything else in the information given by "AMD Polaris" can be made up, however "all core boost" value is interesting. If someone was to spread false rumours about Zen, why would they pick such an odd frequency such as 3.05GHz?

And 3050MHz does match the pattern how the CPU Frequency is produced in Zen.

The figures still could be pulled out of *ss, however in that case the person who did that knows exactly how the frequency generation works in Zen.
You just don't end up to such figure by an accident.

Based on that I'd say the 3.05GHz is real, but it is impossible to say if it is the right frequency for "all core boost".

 

[krumme]

Good job TS.
Good catch about 3.05 !
That is some darn interesting figure.
Its a bit ot but looking at p10 it seems 900mhz is bottom so to speak. Now take p11. What is the estimated tdp for a 4gb mobile gpu card at 900MHz?
I was wondering if there was a meaning of a small vega below p11