New Zen microarchitecture details

Discussion in 'CPUs and Overclocking' started by Dresdenboy, Mar 1, 2016.

  1. hojnikb

    hojnikb Senior member

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    Wow, looks like they are still sticking with 2MB of cache. Very disappointing if true.
     
  2. jpiniero

    jpiniero Diamond Member

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    I'm sure OEMs are demanding 35W models, and 2 MB instead of 4 may have been a sacrifice to be able to sell 2M models easily at 35W. Plus cheaper.
     
  3. frozentundra123456

    frozentundra123456 Diamond Member

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  4. ShintaiDK

    ShintaiDK Lifer

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    Its just a trashbin for all failed parts one way or the other I guess. No need to waste more money on testing. High voltage may be the key.
     
  5. JDG1980

    JDG1980 Golden Member

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    Isn't Bristol Ridge the same silicon as Carrizo? I wouldn't expect any increases in cache size; this is a stopgap product based on an architecture that is already EOL.
     
  6. ShintaiDK

    ShintaiDK Lifer

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    Exactly the same yes.
     
  7. NTMBK

    NTMBK Diamond Member

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    But it went so well with AM3+!
     
  8. el etro

    el etro Golden Member

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    Lower manufacturing costs, to make Zen cheaper to most consumers.
     
  9. AtenRa

    AtenRa Lifer

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    It can maintain turbo longer than the 35W TDP. It could also keep the same base CPU clocks when iGPU is used without downclocking the CPU part.
     
  10. nismotigerwvu

    nismotigerwvu Golden Member

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    Bristol Ridge isn't Zen, it's Excavator for the desktop. The reason it is relevant is that it's launching the socket that will be used by Zen. As Bristol Ridge is essentially the same silicon as Carrizo, the 2MB L2 cache is a known entity. From what we've seen from Carrizo, these chips will be a reasonable step up from Kaveri, but still no where near anything Intel is selling in most cases.
     
  11. el etro

    el etro Golden Member

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    My bad, didn't get the conversation.

    But anyway technical aspect remains valid: 2MB L2 make no significant performance penalty over 4MB L2, and the latency is even better, making excavator cache to perform better.
     
  12. Zodiark1593

    Zodiark1593 Platinum Member

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    I don't have a problem with either PGA or LGA myself. The PGA used in mobile parts look like they could bend if you so much as look at them funny, but those are no problem either.
     
  13. DrMrLordX

    DrMrLordX Diamond Member

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    Overall you're right, but some folks are convinced it's gonna hurt game performance.
     
  14. ShintaiDK

    ShintaiDK Lifer

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    Sometimes cache speed matters more than size ;)
     
  15. jpiniero

    jpiniero Diamond Member

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    The L2 would have to be really awful for this to be true.
     
  16. PG

    PG Diamond Member

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  17. itsmydamnation

    itsmydamnation Golden Member

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    the L2 itself isn't awful, but that way CON cores cache is designed is. L2 has really high latency and it has nothing to do with the speed of the arrays but the way it connects to the module.


    edit: CON core is resource limited , (two SSE units over 2 cores) ( two alu's a core), there is lot of SSE code in games meaning the other improvements in EX dont have to execution resources to show themselves in games. The differences you see there are easily within the difference of clock speed.
     
    #492 itsmydamnation, Mar 27, 2016
    Last edited: Mar 27, 2016
  18. Tuna-Fish

    Tuna-Fish Senior member

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    The problem is actually that the L1 is awfully designed. L1 is write-through, so L2 write throughput limits L1 throughput. L2 throughput is limited by number of possible parallel accesses and by latency, so reducing L2 latency improves L1 throughput.
     
  19. VirtualLarry

    VirtualLarry Lifer

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    Ditto!
     
  20. DrMrLordX

    DrMrLordX Diamond Member

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    That's exactly what I meant.
     
  21. Soulkeeper

    Soulkeeper Diamond Member

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    Not exactely, but it should be a certainty that Bristol Ridge is faster than my current system.
    If Summit Ridge was a regression from that level (which is doubtfull), then i'd just not "plop" in an upgrade.
     
  22. Exophase

    Exophase Diamond Member

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    Excavator doubled the L1 dcache size, that could go a long way in undoing the damage of the halved L2 cache.
     
  23. Azuma Hazuki

    Azuma Hazuki Senior member

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    Not as much as making it write-back instead of write-through would :/

    Although I'm no expert in CPU design, the thing that stood out to me when Bulldozer first hit is how slow and insufficient the caches were. I really think the poor computation cores are starving most of the time :(
     
  24. deasd

    deasd Member

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    http://www.bitsandchips.it/52-english-news/6815-speculations-about-zen-after-our-april-s-fool

     
  25. jhu

    jhu Lifer

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    It's how you use it that matters.