Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.

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N7 performance is more or less understood.
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This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.


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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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Doug S

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Feb 8, 2020
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Company acts surprised pikachu that after almost a decade of lying about their manufacturing progress... people won't believe them even when telling the truth. We used to teach kids about this, read them fables about boys and wolves.

Not really sure what the PR team can do. They aren't really set up to be telling people "yes things are going well with 18A, this isn't like how we lied about 10nm for years and a bunch of times since!" People don't want to hear that from the PR office, they want to hear it from the engineers putting their reputations on the line.

Boeing's PR has the same issues, they aren't the ones you want to tell you that the MCAS fixes are solid. You want to hear that from the engineers - especially if you could hear from the ones who were trying to raise the alarm over the issues in the past and were ignored.
 

coercitiv

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People don't want to hear that from the PR office, they want to hear it from the engineers putting their reputations on the line.
Don Soltis is one of those engineers, when he held up that chip he expected the audience to understand he's got a reputation to uphold. He's not some random talking head. Here's the catch though, others have burned this bridge before him. Sometimes reputations can be sacrificed.
 
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dangerman1337

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Hmmmmm, could AMD be wanting Zen 7 launch sooner than later? If I was them I'd do Zen 7 X3D day 1 and just have Zen 6 in the mean time be more budget orientated with maybe Zen 7 non-X3D months after X3D launching.
 

511

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Hmmmmm, could AMD be wanting Zen 7 launch sooner than later? If I was them I'd do Zen 7 X3D day 1 and just have Zen 6 in the mean time be more budget orientated with maybe Zen 7 non-X3D months after X3D launching.
bruh it's pilot production aka Risk Production which always happens before HVM the timelines have not changed H2 28 is the HVM data
 
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Doug S

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It's half node from A16

Despite the way it is named, A16 is not a half node. A16 is N2P plus BSPDN. A14 will be a "full node" jump from N2, though today's "full node" is less than what a half node was 10 or 15 years ago, so the distinction has less and less value.

It isn't clear yet what TSMC's plans are for BSPDN in the A14 era. Will it remain optional, if so will there be a different name like A12 for A14+BSPDN or will it be named A14S (A14 Super Power Rail) or something like that to denote? Guess we'll see.
 

jpiniero

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It isn't clear yet what TSMC's plans are for BSPDN in the A14 era. Will it remain optional, if so will there be a different name like A12 for A14+BSPDN or will it be named A14S (A14 Super Power Rail) or something like that to denote? Guess we'll see.

The slide says they are doing a version of A14 with BSPD in 2029.
 

511

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Despite the way it is named, A16 is not a half node. A16 is N2P plus BSPDN. A14 will be a "full node" jump from N2, though today's "full node" is less than what a half node was 10 or 15 years ago, so the distinction has less and less value.
I meant the PPA is worth only TSMC Half node.
 

Win2012R2

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"@hotchipsorg, someone asked if Intel 18A was on track. Don Soltis from $INTC literally held up a Clearwater Forest SoC and basically said “Yes...this was built on 18A. Everything we’re talking about for Clearwater Forest is on 18A... It’s real, or I wouldn’t be here...""

This is evasion really - the question was whether 18A was on track, which existence of working SoC does not prove in itself, what are the real yields, cost of doing one wafer, cost of advanced packaging? If this was any good Intel would have invited folks with high credibility from say SemiAnalysis and show them real current stuff under NDA but allow them to write publicly opinion whether they believe Intel or not, but that ain't happening.
 
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511

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This is evasion really - the question was whether 18A was on track, which existence of working SoC does not prove in itself, what are the real yields, cost of doing one wafer, cost of advanced packaging?
No Foundry shares this publicly
Intel would have invited folks with high credibility from say SemiAnalysis
Semi analysis has been click baiting too much recently
 

Win2012R2

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No Foundry shares this publicly
1. Other foundries are not in as dire state as Intel (multiplied by their industry weight)

2. This can be shared under NDA, this stuff is supposed to be HVM in what 6 months, so what if some trusted industry figures would review all data and publish their view without stats, what's the problem in that? The only one I see if this true data is shown they won't say things are good, that's the only logical conclusion one might have: therefore 18A is in bad state.

3. I have zero doubt that this data was shared with wanna be customers - they won't trust Intel otherwise, and we know Intel got zero such customers signing up to it.
 

511

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Other foundries are not in as dire state as Intel (multiplied by their industry weight)
Samsung is in a worse state than Intel
This can be shared under NDA, this stuff is supposed to be HVM in what 6 months, so what if some trusted industry figures would review all data and publish their view without stats, what's the problem in that? The only one I see if this true data is shown they won't say things are good, that's the only logical conclusion one might have: therefore 18A is in bad state.
No one gets this data except for customers so keep dreaming
I have zero doubt that this data was shared with wanna be customers - they won't trust Intel otherwise, and we know Intel got zero such customers signing up to it.
Customer with test chips already have the data I wouldn't be surprised if AMD has 18A yield data .
 

DZero

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Jun 20, 2024
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Hmmmmm, could AMD be wanting Zen 7 launch sooner than later? If I was them I'd do Zen 7 X3D day 1 and just have Zen 6 in the mean time be more budget orientated with maybe Zen 7 non-X3D months after X3D launching.
Or... maybe X3D will be the future for mid tier while X6D will be the next step?
 
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Khato

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Seems like Intel's 'problem' with yields comes down to when they consider it to be ready for HVM. My impression is that first products Intel releases on 18A will be closer to TSMC risk production in terms of yields. They can still release a product at 20% yield at a profit... but not much profit. 18A wafers being about three quarters the price of N3E and under half the price of N2 certainly helps.

I do wonder how much of Intel's planned TSMC usage on client side comes down to an expectation that they aren't going to have adequate internal wafer capacity available.
 

Josh128

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Seems like Intel's 'problem' with yields comes down to when they consider it to be ready for HVM. My impression is that first products Intel releases on 18A will be closer to TSMC risk production in terms of yields. They can still release a product at 20% yield at a profit... but not much profit. 18A wafers being about three quarters the price of N3E and under half the price of N2 certainly helps.

I do wonder how much of Intel's planned TSMC usage on client side comes down to an expectation that they aren't going to have adequate internal wafer capacity available.
They cant release a product where 80% of the dies are dead or defective and yield any profit, unless that product is so magical that people will be 4x the going rate for it.
 

Khato

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They cant release a product where 80% of the dies are dead or defective and yield any profit, unless that product is so magical that people will be 4x the going rate for it.
Depends how you define profit. Around 20% yield is enough to cover the manufacturing costs, aka they aren't losing money with every processor sold. But that doesn't cover the R&D and capital costs - that has to wait until yield gets up to normal high volume manufacturing levels.
 
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511

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They cant release a product where 80% of the dies are dead or defective and yield any profit, unless that product is so magical that people will be 4x the going rate for it.
The physical yield is not that bad as you make it out to be also PTL should reach QS Stag soon if they want to release PTL by end of this year.
 

Doug S

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Seems like Intel's 'problem' with yields comes down to when they consider it to be ready for HVM. My impression is that first products Intel releases on 18A will be closer to TSMC risk production in terms of yields. They can still release a product at 20% yield at a profit... but not much profit. 18A wafers being about three quarters the price of N3E and under half the price of N2 certainly helps.

I do wonder how much of Intel's planned TSMC usage on client side comes down to an expectation that they aren't going to have adequate internal wafer capacity available.

TSMC's risk production benchmark is 80% yield. Their mass production benchmark is 90%.

Intel has always sold chips made in early processes yielding FAR below TSMC's 80% mark. If you own the fab and you need to run wafers anyway to tune the process to reach high yields why would you waste resources only running test wafers containing SRAM dies?

Once you're yielding well enough that you are able to get sufficient revenue out of each wafer to pay the variable cost of running it (plus test/packaging) then you might as well sell them. You may not sell them right away - maybe you stockpile them to sell later as low bin chips because they probably don't yet reach desired clock/power targets. Or maybe you sell them into a niche market like industrial (like the 18A stuff Intel recently announced...)

As you say, you can leave amortizing R&D and other fixed costs for later when you're at mass production yields and making huge margins on every wafer. It is just a matter of making sure you don't lose more money during that learning/tuning process than would if you were running a handful of wafers full of SRAM dies.
 
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511

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TSMC's risk production benchmark is 80% yield. Their mass production benchmark is 90%.
TSMC Risk Production benchmark is also tiny SRAM Chips and for mass production i doubt it's 90% right out of the gate it would be 80% easily though for Apple iPhone SoC
 

Doug S

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TSMC Risk Production benchmark is also tiny SRAM Chips and for mass production i doubt it's 90% right out of the gate it would be 80% easily though for Apple iPhone SoC

I thought they used some sort of ARM SoC? A72 based in the past, unless they've updated it to something more recent. Dunno the size. The SRAM is for early work well before risk production begins, and not used for risk/production go live decisions.