Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

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For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE

 

[igor_kavinski]

Northwood wasn't that good, it was a classic bad Intel design propped up by stellar Intel process.

Imagine how good it can be propped up by 18A, with expanded structures (internal caches and buffers of several hundred kilobytes approaching half a megabyte each or even more).

My analogy of Pentium 4 type CPUs and Conroe type CPUs.

Imagine a race car that can go screaming fast on straights but suffers a devastating slowdown on bends. That's P4. Then there's the car that does pretty good on straights but it does comparatively outstanding on bends. That's Conroe.

The thing with P4 type CPUs is that when you are speeding down that straight highway, the sense of speed is just beyond awesome.

 

[DavidC1]

Imagine how good it can be propped up by 18A, with expanded structures (internal caches and buffers of several hundred kilobytes approaching half a megabyte each or even more).

Larger caches are slower. Pentium 4 relied on a very fast 2-cycle L1D cache.

Imagine a race car that can go screaming fast on straights but suffers a devastating slowdown on bends. That's P4. Then there's the car that does pretty good on straights but it does comparatively outstanding on bends. That's Conroe.

The thing with P4 type CPUs is that when you are speeding down that straight highway, the sense of speed is just beyond awesome.

There isn't a single case where P4 is faster than Conroe, even with the clockspeed difference.

It's Trace Cache hit rate is so low that it's a 1-wide decode most of the time. If you look at older articles, it shows that going from 1-2 wide nearly doubles the performance. Sure, TC will cache some of them, but nowhere near a constant 4-wide that Conroe is capable of.

-On top of that, it has an anemic 8KB L1D cache.
-On top of that it has a 20+ stage pipeline, meaning significant losses
-Not to mention it barely has any useful units for actual execution

Pentium 4 is a gas-guzzing V10 that can only output 100HP and 100lb-ft of torque and the whole car weights 5000lbs. It's slow in straight lines, but in bends it's slower than a bicycle.

And we got a proper Pentium 4 at 32nm called Sandy Bridge. The 18A version called Novalake really sucks though.

 

[Io Magnesso]

Larger caches are slower. Pentium 4 relied on a very fast 2-cycle L1D cache.

There isn't a single case where P4 is faster than Conroe, even with the clockspeed difference.

It's Trace Cache hit rate is so low that it's a 1-wide decode most of the time. If you look at older articles, it shows that going from 1-2 wide nearly doubles the performance. Sure, TC will cache some of them, but nowhere near a constant 4-wide that Conroe is capable of.

-On top of that, it has an anemic 8KB L1D cache.
-On top of that it has a 20+ stage pipeline, meaning significant losses
-Not to mention it barely has any useful units for actual execution

Pentium 4 is a gas-guzzing V10 that can only output 100HP and 100lb-ft of torque and the whole car weights 5000lbs. It's slow in straight lines, but in bends it's slower than a bicycle.

And we got a proper Pentium 4 at 32nm called Sandy Bridge. The 18A version called Novalake really sucks though.

No, nova Lake is a bad piece even if you use N2
No matter how bad the 18A process is, don't impose Nova Lake's architectural failure on the process side.
If you go with that recognition, TSMC N2 will also be a bad process node.
And, as I have said many times, using N2 does not get better Look at the reality

 

[Io Magnesso]

No, nova Lake is a bad piece even if you use N2
No matter how bad the 18A process is, don't impose Nova Lake's architectural failure on the process side.
If you go with that recognition, TSMC N2 will also be a bad process node.
And, as I have said many times, using N2 does not get better Look at the reality

You are the one pointing out the bad architecture of Nova Lake. I I thought you were a decent and intelligent person... but...
I don't think I have eyes to look at people...
If you don't reflect...

 

[Doug S]

Northwood wasn't that good, it was a classic bad Intel design propped up by stellar Intel process. Intel would have been in a far better position if they optimized Pentium M earlier for desktops and had that instead.

I remember when the stance against Pentium 4 changed. That was in January 2002 with the introduction of the 2.2GHz Pentium 4 "Northwood". 5% faster per clock along with 10% higher clocks allowed Intel to edge out Athlons. The clocks scaled faster due to Intel's new process.

I used to be a big Intel fan back then. I would email Intel before Northwood release saying: "Hey 5% gains with doubled cache isn't enough..." or to that effect. Which was what Northwood turned out to be.

My conveyed the reality of the chip for me: "Oh it's only a few % better". When Conroe came out, it was dramatically better. That wasn't Northwood.

In fact I think Northwood's success is what delayed the inevitable transition to the new uarch focused on power efficiency.

Intel had been marketing MHz to consumers for years, and the architects behind the P4 design believed they'd be able to scale it to 10 GHz. So you had both the engineers and the marketers marching to the same drum. They had to take it as far as it they did and see it blow up in their faces before they were able to turn that train around.

They're just lucky that laptops had become a more important market segment so they let the engineers in Haifa iterate the P3 core to create a lower power design more amenable to laptops. If not for that they would have had nothing to turn to when P4 hit the power wall, and AMD would have seen a lot more success with Athlon/Opteron despite Intel's process advantage.

Even as it was reportedly a lot of the marketing people thought dropping the P4 design was a mistake, that even if it was lower performance they could SELL it to consumers despite that, based on its huge MHz lead over AMD. I think they're right about that, most consumers don't read reviews. They had been trained for years that "more MHz means more performance" and most would have continued to buy. I think the reason they had to switch was because enterprise buyers are smarter, and Intel's dominance in servers would have been under threat if they tried to sell P4 to that more knowledgeable customer base.

 

[DavidC1]

They're just lucky that laptops had become a more important market segment so they let the engineers in Haifa iterate the P3 core to create a lower power design more amenable to laptops. If not for that they would have had nothing to turn to when P4 hit the power wall, and AMD would have seen a lot more success with Athlon/Opteron despite Intel's process advantage.

It wasn't just laptops. Pentium M was triggered nearly entirely by Transmeta's Crusoe, and Via got some headwind as well. It came out in 2000, just before Intel got their space-heater architecture out.

Pentium M was better in every way. Same pipeline stages but it seriously outclocked the Pentium III on the same 0.13u process. 1.7GHz vs 1.4GHz. And it performed 30% better per clock, all at same power. Also in laptops it actually delivered better battery life, because SpeedStep wasn't just factory underclocking on battery, but it was dynamic based on usage scenario.

 

[Hulk]

I moved from a PIII Tulatin to P4 Northwood 3.06. My first HT part. It was a magnificent upgrade. I remember that vividly.

Multitasking finally seemed "multi."

Of course when I upgraded to the Conroe 6400 actual dual core it was another night and day difference in performance from the P4, which was instantly a relic. Two actual cores, like 100% improvement in IPC, and great o/c headroom.

Alas, poor Intel, I knew him well...

 

[DavidC1]

No, nova Lake is a bad piece even if you use N2
No matter how bad the 18A process is, don't impose Nova Lake's architectural failure on the process side.

I never said 18A was a failure. It's yet to be seen. I think it'll actually be decent.

Is English a bit hard for you?

 

[igor_kavinski]

Is English a bit hard for you?

He's from Japan.

 

[DavidC1]

He's from Japan.

Ah, I see. Thanks.

 

[Io Magnesso]

I never said 18A was a failure. It's yet to be seen. I think it'll actually be decent.

Is English a bit hard for you?

No, I understand what you mean
But if nova Lake made with Intel 18A is a piece of crap... The TSMC N2 version of Nova Lake, which has the same architecture, will inevitably become a piece of crap.

 

[Tigerick]

삼성 파운드리, 1.4㎚ 2029년 양산…'가동률 회복' 집중

삼성전자 파운드리사업부가 1.4나노미터(㎚) 반도체 양산 순연을 공식화했다. 기존 대비 2년 늦은 2029년 양산을 목표로 내세웠다. 1.4㎚ 양산을 늦추는 대신 2㎚ 이상 공정 완성도를 높이고 가동률을 끌어올려 수익성을 개선하려는 시도로 풀이된다. 삼성전자는 1일 서

www.etnews.com

Yep, it is official. SF has delayed the HVM date of SF1.4 to 2029; two years later.

Meanwhile, SF is focusing on improving yield and performance of SF2 onwards. GAA: SF3E, SF3, SF2, SF2P and SF2X and so on...until SF gets new customers

Did Qualcomm kill Samsung-made Snapdragon 8 Elite Gen 2 for Galaxy S26 Ultra?

Qualcomm is rumored to have discontinued the Samsung-made version of its upcoming Snapdragon 8 Elite Gen 2 chipset.

www.sammobile.com

It is done deal business for Qualcomm and yet Qualcomm has cancelled 8 Elite Gen 2 that being fabbed by SF2. Why ???? Even if Samsung manage to build Exynos 2600, the performance difference between E2600 and 8 Elite G2 (fabbed by N3P) are interesting to watch...

 

[511]

삼성 파운드리, 1.4㎚ 2029년 양산…'가동률 회복' 집중

삼성전자 파운드리사업부가 1.4나노미터(㎚) 반도체 양산 순연을 공식화했다. 기존 대비 2년 늦은 2029년 양산을 목표로 내세웠다. 1.4㎚ 양산을 늦추는 대신 2㎚ 이상 공정 완성도를 높이고 가동률을 끌어올려 수익성을 개선하려는 시도로 풀이된다. 삼성전자는 1일 서

www.etnews.com

Yep, it is official. SF has delayed the HVM date of SF1.4 to 2029; two years later.

Meanwhile, SF is focusing on improving yield and performance of SF2 onwards. GAA: SF3E, SF3, SF2, SF2P and SF2X and so on...until SF gets new customers

Good Decision

 

[DrMrLordX]

Does Samsung have any major customers for SF3-family nodes anymore? Who actually uses it?

edit: also . . .

MSN

not sure if anyone posted this already. Meh!

 

[511]

Does Samsung have any major customers for SF3-family nodes anymore? Who actually uses it?

the only product i could find with SF3 is a 17mm2 arm chip used in galaxy watch

 

[DrMrLordX]

the only product i could find with SF3 is a 17mm2 arm chip used in galaxy watch

Sad.

 

[poke01]

the only product i could find with SF3 is a 17mm2 arm chip used in galaxy watch

The Flip 7 will use SF3 SoC, releases end of July

 

[igor_kavinski]

Maybe SF3 is good enough for P4?

 

[511]

Maybe SF3 is good enough for P4?

Well Glenn Hilton is at Intel and iirc he is one of the architects of P4 maybe he is working on a P4 successor based on Unified Core alongside atom team.

 

[jpiniero]

I still think nVidia will go back to Samsung for Gaming GPUs at some point. Probably just the low end.

 

[511]

I still think nVidia will go back to Samsung for Gaming GPUs at some point. Probably just the low end.

Nvidia is less likely cause they want high yielding process they jump to TSMC a bit later than everyone else to let the process mature more and the last high yielding Samsung process was 8nm(10nm +)

 

[Josh128]

Imagine how good it can be propped up by 18A, with expanded structures (internal caches and buffers of several hundred kilobytes approaching half a megabyte each or even more).

My analogy of Pentium 4 type CPUs and Conroe type CPUs.

Imagine a race car that can go screaming fast on straights but suffers a devastating slowdown on bends. That's P4. Then there's the car that does pretty good on straights but it does comparatively outstanding on bends. That's Conroe.

The thing with P4 type CPUs is that when you are speeding down that straight highway, the sense of speed is just beyond awesome.

P4? P4 sucked major balls in every scenario, Core 2 obliterated it everywhere.

 

[Win2012R2]

I still think nVidia will go back to Samsung for Gaming GPUs at some point. Probably just the low end.

They did - for Switch 2

I think it'll actually be decent.

It got Pat fired.

Imagine how good it can be propped up by 18A, with expanded structures (internal caches and buffers of several hundred kilobytes approaching half a megabyte each or even more).

It's gonna suck and no process will fix it.

 

[511]

They did - for Switch 2

They did not go back they had Ampere on 8nm already and A78 as well they simply reused their IP.

 

[jpiniero]

They did not go back they had Ampere on 8nm already and A78 as well they simply reused their IP.

I believe the Switch 2's SoC taped out in 2021.