Discussion Intel Nova Lake in H2-2026: Discussion Threads

[OneEng2]

Good that you did not doubt it happening, many other on the forum did for non-valid technical reasons.

I actually feel that it is a poor decision based on financials for Intel . Any engineering work Intel does in desktop that takes away a single hour of engineering effort in recovering their edge in DC is financially devastating IMO.

 

[Thunder 57]

Not many were using 6/8C when they were first introduced either, but pioneers pushed the boundaries and now it’s mainstream. Same will happen now.

Going to have to disagree there. We went from 2010 to 2017 limited to four cores and people did start to complain. Mainstream 6/8 cores were a very welcome addition. People are generally very happy with 8 cores today. The top 10 best sellers on Amazon are all 6-8 P core CPU's. I suspect the best selling NVL will be the 8P/16E model.

 

[inquiss]

Going to have to disagree there. We went from 2010 to 2017 limited to four cores and people did start to complain. Mainstream 6/8 cores were a very welcome addition. People are generally very happy with 8 cores today. The top 10 best sellers on Amazon are all 6-8 P core CPU's. I suspect the best selling NVL will be the 8P/16E model.

Bingo, and the best selling AMD chip will not be the 24c. Not even close. Literally no one cares for high core count on consumer. If you care you buy something bigger.

 

[Joe NYC]

https://videocardz.com/newz/intel-nova-lake-s-desktop-platform-shows-up-in-shipping-data-with-up-to-52-cores

52 Core variant spotted.

Looking at the shipping manifest, these look like various testing tools for the socket, not the actual CPU. Unless I am missing something...

 

[Joe NYC]

Tariffs are currently going to raise prices; however, both a district court, and now a Federal Appellet court have ruled that most (including the chip tariffs) tariffs imposed as "recipricol" are not constitutional. It is likely this will be addressed by the Supreme court by June 2026.

I think it likely the Supreme court will uphold the prior 2 rulings. The BEST case would be for SCOTUS to rule that "Tariffs" are "Taxes" and require the US Congress to pass laws to change them.

Of course, pricing has a nasty way of going up IMMEDIATELY and taking quite some time to go back down .

Semiconductors were exempt from tariffs in the first place. None of what place in court affects current or upcoming prices, since the tariff is 0% to begin with.

Never mind the MLID retardation about tariffs in his videos...

 

[OneEng2]

Bingo, and the best selling AMD chip will not be the 24c. Not even close. Literally no one cares for high core count on consumer. If you care you buy something bigger.

With a single CCD, both AMD and Intel will provide the most popular products. This is certain.

What may be interesting is how things shake out in the high end. Currently AMD is eating up the high end and thus the best margins.

I wonder how much of that "high end" is occupied by X3D vs non-X3D though. A single CCD Zen 6 X3D might be scary fast .... and the customer base for this product is highly educated so the "more cores" marketing won't have any sway.

Still, marketing is powerful. If Intel can convince people that 52 is better than 24? Perhaps something with the Blue Man Group .

Semiconductors were exempt from tariffs in the first place. None of what place in court affects current or upcoming prices, since the tariff is 0% to begin with.

Never mind the MLID retardation about tariffs in his videos...

You are correct in the biggest sense of the discussion. TSMC is exempt due to its investment commitments in the US. I wouldn't bet heavily on the idea that their foreign made chips continue to stay "in the good graces" forever.

 

[DavidC1]

Coral is Unified cause they ain't got anything post griffin cove in the family for P cores and Griffin is like a mid improvement over Panther Cove i doubt it would do any good in 2028.
View attachment 129542

That does make it 2029+. Pantherlake is 2026, not 2025, since 5 laptops in December 2025 doesn't count. Plus it's server so it arrives later. We had Redwood Cove and Crestmont cores in Xeons in the same year as Arrowlake.

 

[Khato]

The high end NVL sku will probably be of greater interest due to the increased L3 than the increased core count. Though I do wonder what the point of diminishing returns is for L3 cache size on consumer workloads, in particular gaming. 100MB? 200MB? 300MB?

 

[igor_kavinski]

We had Redwood Cove and Crestmont cores in Xeons in the same year as Arrowlake.

Yeah. That's truly sad and validates AMD's approach.

I was discussing why our "fat" dotnet application ran so slow on our server with my COO. When I mentioned that our desktop PCs have faster CPUs than our server, he looked confused like wanting to say, "That makes no sense! Servers cost a fortune!". And now sadly Intel is making knowledgeable IT managers turn the other way with their bad value server chip design.

 

[511]

That does make it 2029+. Pantherlake is 2026, not 2025, since 5 laptops in December 2025 doesn't count. Plus it's server so it arrives later. We had Redwood Cove and Crestmont cores in Xeons in the same year as Arrowlake.

AMD released Strix Point Q2 24 xDd it should be called Q3-Q4 launch than fact of matter is it will still be called Q4 25 launch.

Yeah. That's truly sad and validates AMD's approach.

I was discussing why our "fat" dotnet application ran so slow on our server with my COO. When I mentioned that our desktop PCs have faster CPUs than our server, he looked confused like wanting to say, "That makes no sense! Servers cost a fortune!". And now sadly Intel is making knowledgeable IT managers turn the other way with their bad value server chip design.

Is he buying Skylake/Ice Lake Servers cause SPR/EMR are pretty fast in per core performance though no Server CPU will be matched against a 13900K running 5.8 GHz for single threaded task.

 

[OneEng2]

Is he buying Skylake/Ice Lake Servers cause SPR/EMR are pretty fast in per core performance though no Server CPU will be matched against a 13900K running 5.8 GHz for single threaded task.

... and any app that would run faster on a 5.8Ghz 13900K should be considering something more like a workstation processor vs a server IMO.

 

[igor_kavinski]

... and any app that would run faster on a 5.8Ghz 13900K should be considering something more like a workstation processor vs a server IMO.

Not easy to get a high performance CPU in a 1U form factor. Workstations usually come in at least 4U chassis. Also, getting a hardware vendor (that the COO refuses to replace) to go with anything bigger than 1U is also part of the problem. Plus, the data center charges per 1U rack space so colocation hosting costs get magnified with bigger machines.

 

[vanplayer]

The high end NVL sku will probably be of greater interest due to the increased L3 than the increased core count. Though I do wonder what the point of diminishing returns is for L3 cache size on consumer workloads, in particular gaming. 100MB? 200MB? 300MB?

Well at least from what I've heard, the rumored cache size of NVL are completely wrong. Guys should lower the expectation. Anything equal or more than 144mb is impossible.

 

[511]

Well at least from what I've heard, the rumored cache size of NVL are completely wrong. Guys should lower the expectation. Anything equal or more than 144mb is impossible.

Bruh 144MB is a single Compute die two Compute die is 288 MB L3.

 

[igor_kavinski]

I laughed off Genoa having 1.15 gigs of cache when I first heard about it but that turned out to be true so I would say anything is possible.

 

[adroc_thurston]

I laughed off Genoa having 1.15 gigs of cache when I first heard about it but that turned out to be true so I would say anything is possible.

12*96M.
AMD doesn't do unified caches.

 

[igor_kavinski]

12*96M.
AMD doesn't do unified caches.

Yeah but even that combined cache seemed impossible at the time.

 

[vanplayer]

Bruh 144MB is a single Compute die two Compute die is 288 MB L3.

I'm fed up with these trash rumors.
One can hope per-tile cache is still large, source didn't explicitly said per-tile cache and total cache amount. But 144mb L3 per-tile is impossible even at best scenario.

I laughed off Genoa having 1.15 gigs of cache when I first heard about it but that turned out to be true so I would say anything is possible.

Due to either socket or TSMC process node limitation, or both.

 

[igor_kavinski]

But 144mb L3 per-tile is impossible even at best scenario.

They can probably do it if they treat the halo part as important as it's a server CPU. They want any advantage they can even if it's just size to declare supremacy over AMD's competing product.

 

[adroc_thurston]

But 144mb L3 per-tile is impossible even at best scenario.

It's literally what's inside.

 

[511]

One can hope per-tile cache is still large, source didn't explicitly said per-tile cache and total cache amount. But 144mb L3 per-tile is impossible even at best scenario.

It's not impossible and these are not BS Rumors it's just 20-30mm2 extra die

 

[adroc_thurston]

it's just 20-30mm2 extra die

'just'.

 

[511]

'just'.

I forgot it was N2 for a moment if it was Intel fabs that would have been just lol

 

[adroc_thurston]

if it was Intel fabs that would have been just lol

Let's not pretend 18A and friends are magically super-cheap (they aren't).

 

[511]

Let's not pretend 18A and friends are magically super-cheap (they aren't).

Even though 18A ain't cheap but they are eating double margin on 18A products unlike N2.