Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[AMDK11]

For those of you that think Intel's P core team is still good, David Huang points out in his review that the branch mispredict in Lion Cove regressed compared to Golden Cove.

In contrast, Skymont's branch predictor improved substantially over Gracemont, and now exceeds not only Zen 4's MKPI performance but also Lion Cove's as well.

Huang also points out that the performance per watt of Lion Cove cluster is poor despite being on a new process.

P core team, it's time to be replaced!

I simply don't want to worry about my display flunking. I had desktop monitors have problems after 5 years of usage(Samsung models) but that's regular degradation. OLED burn-in is pretty much a certainty.

OLED is perfect for modern throw-away junk that needs borrowing credit to afford it.

Maybe I'm wrong, but I assume that LionCove for LunarLake has a reduced predictor to save space and energy requirements.

 

[DrMrLordX]

Even AMD's GPUs are essentially DoA for training.

Wrong thread for this but no, MI is really good and I don't think you're being realistic here. Nobody from AMD has made statements similar to Gelsinger's. It's a huge admission of defeat to come out and say "we aren't going to compete with XYZ in ML training".

 

[naukkis]

Maybe I'm wrong, but I assume that LionCove for LunarLake has a reduced predictor to save space and energy requirements.

Copy that. Other way it doesn't make any sense - they could have reverted to GC predictor if there ain't any benefits in their new solution.

 

[coercitiv]

It's a mobile part, it's very difficult to get a core to sustain it's fmax without dips.

The overall point should be that ComputerBase data shows that in CB R24 1T it achieves a higher score while also drawing less power than Strix.

I agree, that's why I explained that a single frequency graph can only provide us with limited insight. The erratic clocks are a sign of throttling, either power or thermal (or both). Focusing on benchmark scores and power / battery life is a much better way to evaluate LNC in LNL, especially with limited number of devices in reviews. When ARL lands we'll have a much easier time to map power usage at various clocks.

 

[jdubs03]

Some confirmation for all intents and purposes:

https://videocardz.com/newz/intel-nova-lake-with-coyote-cove-xeon-diamond-rapids-gets-panther-cove-x-cores

 

[cebri1]

Seems like Panther Cove will be their first full top to bottom arch in years.

 

[511]

Even AMD's GPUs are essentially DoA for training. Nvidia has massive software, interconnect / scale advantage. The new compute unit for them are racks with massive interconencts between the gpu. Google is the only one (as far as I know) that has similar interconnect infrastructure. AMD and Intel can only compete at smaller model traning and inference. We'll see what happens when Intel starts integrating silicon photonics into their hardware, but this will take years. Intel at least has solid software compared to AMD.

Intel is the only game with photonics as far as i am aware along with Broadcom I don't think intel will have more trouble than AMD will have if their Fab is back to where it was
I have heard from ex Intel Guys how BK cancelled AI/GPU etc and crazy products for shareholders

 

[511]

Intel's software is very good if you want proof look at Open VINO Embree X265 ST-AV1 Intel MKL ISPC Also how they are actually making ARC Xe1 somewhat viable despite the broken HW performance in rendering application for ARC their software advantage is something that has allowed them to pull a win even on inferior hardware

 

[SiliconFly]

.

 

[AMDK11]

Copy that. Other way it doesn't make any sense - they could have reverted to GC predictor if there ain't any benefits in their new solution.

LionCove is supposedly a regression in terms of prediction, but in the slides Intel shows that it has a larger prediction block up to 8x. So what's it like? 8x bigger and yet worse than in GoldenCove? However, I would reserve final judgment for the LionCove analysis at ArrowLake.

 

[Hitman928]

Okay I thought so. So on to my next question: Intel didn't just buy N3B from TSMC's existing production capacity. Intel paid up front for an entire fab to be built to fill their order. TSMC was also forced to refit a research fab to full production to complete the order. Again, the devil's in the details (e.g. the contract), but wouldn't facilities built for N3B production require retooling before they could run N3E/N3P? Or am I overthinking this? Yes I suppose Intel could take N3E/N3P wafers per their contract from other facilities assuming TSMC is flexible enough to fill those orders, but . . .


This article is the closest I've seen to recent news regarding Falcon Shores:

Intel’s Falcon Shores Future Looks Bleak as It Concedes AI Training to GPU Rivals

Intel’s Falcon Shores future looks bleak as it concedes AI training to GPU rivals On Monday, Intel sent a letter to employees detailing its comeback plan after an abysmal second-quarter […]

www.hpcwire.com

Technically there was no official announcement of Falcon Shores being cancelled, though Gelsinger seemed to imply that it was DoA due to his statement about not competing with NV and AMD in the GPU AI training space.

N3E/B/P all use the same equipment and N3E is actually easier to make than N3B so I don't see any reason why they couldn't run N3E on the N3B lines. Obviously there are differences in how the wafer is made, but that's just changing the recipe using the same kitchen.

Falcon shores began well before the current AI fervor. It was originally supposed to be an HPC product with CPUs and GPUs. Obviously Intel is in a state of flux right now, so anything is possible, but just because Intel says they won't compete in training, doesn't mean that they won't try and position FS as an inference and/or HPC product.

 

[cannedlake240]

Cougar Cove might bring in better performance than expected.

Well apparently It's a tick uarch, stop gap between Lion and Panther cove, like RWC

 

[igor_kavinski]

Well apparently It's a tick uarch, stop gap between Lion and Panther cove, like RWC

NOOOOOOOOOOOOOOOOOOOOO

 

[cannedlake240]

NOOOOOOOOOOOOOOOOOOOOO

InTeL iS dOoMeD!

 

[511]

InTeL iS dOoMeD!

On P core side at least i wanted to do a poll Intel P core vs Intel E core i already know the response from the looks of it 🤣

 

[OneEng2]

It's N4P N3P won't be out until next year N3E for 5C iirc

You are wrong on the process this time Intel 3 is not a joke of process it's the RWC that sucks like Intel P core design Sierra Forest is pretty efficient and good for it's Market
AMD MOAR cores Turin dense 192C/384Tvs 288C/T core SRF
For P core the core counts are matched i am expecting 40% uplift compared to Genoa for AMD


This will not be the case everywhere this time we have to wait 15 days for it 🤣

Thanks for the correction.

So the matchup is N4P and full Zen 5 128 cores vs. Intel 3 and full Redwood Cove 128 Cores (for now).

From my browsing through SemiWiki forums it seems that Intel 3 is considered a rough match for TSMC N5. Currently, most people that are process geeks (or actual professionals) seem to believe that it will take Intel 18A to EQUAL N3 and that TSMC N2 will exceed the capabilities of 18A by a good margin.

This makes sense to me considering how far behind Intel got itself in the foundry tech.

The current matchup is still not a blow out through (as it was) in the server space. I believe that ZEN 5 on N4P still enjoys a performance advantage over Redwood Cove, and still enjoys a performance/watt advantage (although both have been cut down by Intel). ZEN 5 also appears to SMT quite a bit better than Redwood Cove which makes me think that server benchmarks might favor ZEN 5 at the same clock speed as Redwood Cove by around 15-20%. I am also thinking that ZEN 5 will run cooler than Redwood Cove allowing it to scale higher in frequency in a dense core chip where thermal density will be the actual limitation on the core frequency.

Still, all your points are very valid. AMD will NOT enjoy a 100-400% advantage over Intel in the server space any longer. I wouldn't be surprised to see AMD Turin 128 best the 128 core Granite Rapids by 50% when both are constrained to 500W.

I also wonder about Intel's 18A release. As we have repeatedly said, Intel has really bet the farm on this process node. Based on everything I have read, it looks like it will struggle to equal N3 and if there is even a little delay in timing, it will be up against N2 .... which would leave Intel again with a process disadvantage against AMD and IIRC place Crestmont 18A server chips up against AMD N2 Zen 6.

Still, not a blow out, but likely leaves Intel behind.

 

[jpiniero]

I have a feeling if you dropped the TDP to 350, that the 6980P would lose to Genoa most of the time.

 

[SiliconFly]

.

 

[511]

Thanks for the correction.

So the matchup is N4P and full Zen 5 128 cores vs. Intel 3 and full Redwood Cove 128 Cores (for now).

From my browsing through SemiWiki forums it seems that Intel 3 is considered a rough match for TSMC N5. Currently, most people that are process geeks (or actual professionals) seem to believe that it will take Intel 18A to EQUAL N3 and that TSMC N2 will exceed the capabilities of 18A by a good margin.

Depends on metrics
density it is slightly behind but on PPW it is between N3E and N5 and the fin configuration as well you can check both of these it is between N4P and N3E also the 3-3 fin is similar between Intel 3 and N3E according to wikichip
All the sources are listed stop saying Intel 3 is at N5 level outside of density unless specifying the use case which in Terms of Intel and AMD is HPC

Intel 4 Deep Dive - Semiwiki

As I previously wrote about here, Intel is presenting their Intel 4 process at the VLSI Technology conference. Last Wednesday Bernhard Sell (Ben) from Intel gave the press a briefing on the process and provided us with early access to the paper (embargoed until Sunday 6/12). “Intel 4 CMOS...

semiwiki.com

VLSI Technology Symposium – Intel describes i3 process, how does it measure up? - Semiwiki

At the VLSI Technology Symposium this week Intel released details on their i3 process. Over the last four nodes Intel has had an interesting process progression. In 2019, 10nm finally entered production with both high performance and high-density standard cells. 10nm went through several...

semiwiki.com

By TSMC own admission N3P is on Par with 18A

This makes sense to me considering how far behind Intel got itself in the foundry tech.

Yes all those years of 14nm++++ and 10nm+++
Are finally ending pat should get credit for correcting predecessors mistake

The current matchup is still not a blow out through (as it was) in the server space. I believe that ZEN 5 on N4P still enjoys a performance advantage over Redwood Cove, and still enjoys a performance/watt advantage (although both have been cut down by Intel). ZEN 5 also appears to SMT quite a bit better than Redwood Cove which makes me think that server benchmarks might favor ZEN 5 at the same clock speed as Redwood Cove by around 15-20%. I am also thinking that ZEN 5 will run cooler than Redwood Cove allowing it to scale higher in frequency in a dense core chip where thermal density will be the actual limitation on the core frequency.

I have said it many time Intel's P core team is horrendously bad look at how efficient and cool and less power Sierra forest consumes it's not because of node but because P cores are disappointing

Still, all your points are very valid. AMD will NOT enjoy a 100-400% advantage over Intel in the server space any longer. I wouldn't be surprised to see AMD Turin 128 best the 128 core Granite Rapids by 50% when both are constrained to 500W.

I think it will be 25-30% dependent on workloads

I also wonder about Intel's 18A release. As we have repeatedly said, Intel has really bet the farm on this process node. Based on everything I have read, it looks like it will struggle to equal N3 and if there is even a little delay in timing, it will be up against N2 .... which would leave Intel again with a process disadvantage against AMD and IIRC place Crestmont 18A server chips up against AMD N2 Zen 6.

It's not crestmont but a buffed up chadmont so i don't think performance per core gap will be that much wider between 5C/ and Darkmont TSMC saying 18A matches N3P so how is it struggling considering N3P is the best Process in N3 family 🤣

Still, not a blow out, but likely leaves Intel behind.

Intel will have 2 differentiation Supply and good SW i don't believe AMDs supply even in server space otherwise with the massive lead they have they should have taken market share crazily which they didn't it will be even tougher now

 

[511]

biggest customers of TSMC. They may already have signed deals for N2 capacity. IFS will not drag down Intel client/server anymore. This likely leaves AMD behind for good (like now).

About this part i have heard that many projects are moving inhouse from TSMC as they are getting their foundry game back even in semiwiki lot's of talk is going on how Intel will be mostly inhouse after N3 they Used TSMC to save themselves

 

[511]

One intresting thing
Intel 128core GNR will have TOPS equal to Nvidia A100
2048 Int 8 ops/clk 3 Ghz clk and 128 cores roughly equals to 786TOPs

 

[H433x0n]

Thanks for the correction.

So the matchup is N4P and full Zen 5 128 cores vs. Intel 3 and full Redwood Cove 128 Cores (for now).

From my browsing through SemiWiki forums it seems that Intel 3 is considered a rough match for TSMC N5. Currently, most people that are process geeks (or actual professionals) seem to believe that it will take Intel 18A to EQUAL N3 and that TSMC N2 will exceed the capabilities of 18A by a good margin.

This makes sense to me considering how far behind Intel got itself in the foundry tech.

TSMC N4P:
3-3 Fin -> 98 MTr/mm²
2-2 Fin -> 144 MTr/mm²

TSMC N3B:
3-3 Fin -> 124 MTr/mm²
2-2 Fin -> probably exceeds 180 MTr/mm²

Intel 3:
3-3 Fin -> 124 MTr/mm²
2-2 Fin -> 144 MTr/mm²

This ignores performance entirely, that's much harder to quantify.

 

[gdansk]

One intresting thing
Intel 128core GNR will have TOPS equal to Nvidia A100
2048 Int 8 ops/clk 3 Ghz clk and 128 cores roughly equals to 786TOPs

But only ~840 GB/s bandwidth with the fastest 8800 MT/s memory. So I do wonder if it is "equal" in practice to A100.
Edit: this is the wrong thread again. If you do respond, please respond in the Rapids thread.

 

[Doug S]

Skylake was the beginning of the end for Intel. The bugs in that were what prompted Apple to ditch them coz Apple engineers were basically doing Intel's job for them by finding silicon bugs and reporting them to Intel. And Apple still gave them business till Ice Lake. I like to think that Skylake was when they decided to lie on their back and ass and all they could see was the sky, rather than incoming traffic. Pat tried to steer them but in the wrong direction!

You don't really believe Apple would have continued using Intel CPUs when they had their own designs that were rapidly improving and on track to exceed Intel's, do you? They "ditched" AMD GPUs also, and AFAIK they didn't have any issues with AMD (certainly nothing like the issues they had with Nvidia over bumpgate)

Apple was always going to go to their own CPUs in the Mac. Given that they all beat the performance of the Intel Macs they replaced, they seemed to have waited until they were ready. Had they made the move over dissatisfaction with Intel they would have pulled the trigger earlier, before their designs were capable of beating the Intel Macs.

Had they not switched, people would sure have been wondering what the heck Apple is doing still selling Intel Macs if they dropped the A18P last week - beating Intel/AMD's top CPUs in ST in a fricking phone!

 

[AMDK11]

You don't really believe Apple would have continued using Intel CPUs when they had their own designs that were rapidly improving and on track to exceed Intel's, do you? They "ditched" AMD GPUs also, and AFAIK they didn't have any issues with AMD (certainly nothing like the issues they had with Nvidia over bumpgate)

Apple was always going to go to their own CPUs in the Mac. Given that they all beat the performance of the Intel Macs they replaced, they seemed to have waited until they were ready. Had they made the move over dissatisfaction with Intel they would have pulled the trigger earlier, before their designs were capable of beating the Intel Macs.

Had they not switched, people would sure have been wondering what the heck Apple is doing still selling Intel Macs if they dropped the A18P last week - beating Intel/AMD's top CPUs in ST in a fricking phone!

So what? Apple cores operate at much lower clock speeds, are in a completely different software model (ARM) and do not offer high enough performance (if at all) to justify a mass switch of PCs to ARM processors. Most people don't know what IPC is, and for many it's about x86 and peak performance. IPC and architecture are only interesting to us (enthusiasts), for the rest of the people it doesn't really matter much.

For most people, it doesn't really matter how the final performance was achieved.